feat: add test for better syntax #11

	name: cocotb_unit_test
	on: [push, workflow_dispatch]
	jobs:
	test:
	runs-on: ubuntu-24.04
	steps:
	- name: Checkout repository
	uses: actions/checkout@v4
	with:
	submodules: recursive

	- name: Install iverilog
	shell: bash
	run: sudo apt-get update && sudo apt-get install -y iverilog

	- name: Setup python
	uses: actions/setup-python@v5
	with:
	python-version: '3.10'

	- name: Install cocotb
	run: pip install cocotb

	- name: Run cocotb unit test [ex01_and_gate]
	run: \|
	cd ex01_and_gate/test
	make
	! grep failure results.xml
	cd ../..

	- name: Run cocotb unit test [ex01_and_gate_better]
	run: \|
	cd ex01_and_gate/test
	make TOPLEVEL=better_and_gate VERILOG_SOURCES=../better_and_gate.v
	! grep failure results.xml
	cd ../..

	- name: Run cocotb unit test [ex02_1_bit_full_adder]
	run: \|
	cd ex02_1_bit_full_adder/test
	make
	! grep failure results.xml
	cd ../..

	- name: Run cocotb unit test [ex02_1_bit_full_adder_better]
	run: \|
	cd ex02_1_bit_full_adder/test
	make TOPLEVEL=better_full_adder VERILOG_SOURCES=../better_full_adder.v
	! grep failure results.xml
	cd ../..

	- name: Run cocotb unit test [ex03_4_bit_half_adder]
	run: \|
	cd ex03_4_bit_half_adder/test
	make
	! grep failure results.xml
	cd ../..

	- name: Run cocotb unit test [ex03_4_bit_half_adder_better]
	run: \|
	cd ex03_4_bit_half_adder/test
	make TOPLEVEL=better_half_adder_4 VERILOG_SOURCES=../better_half_adder_4.v
	! grep failure results.xml
	cd ../..

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