Fix serial port on AMD picasso and newer #74
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…AL_PAYLOAD_SERIAL_PORT_INFO Signed-off-by: Matt DeVillier <[email protected]> Change-Id: I9bcaf03ab63f6a45d2cf25a580f7a2eba388cbbd
…ialInfo Signed-off-by: Matt DeVillier <[email protected]> Change-Id: If764bd7c0b691cf887205471d0343fdf62372141
Fixes serial output on platforms using coreboot and a non-default clock rate such as AMD Picasso and newer. Signed-off-by: Matt DeVillier <[email protected]> Change-Id: I91290397852176754e9a34ec6e5829044f41d15a
UEFIPAYLOAD.fd should be build with --pcd gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD=0x80 instead. See https://review.coreboot.org/c/coreboot/+/87415 This reverts commit 72baad4.
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