CMSIS-RTX 5.9.1

Maintenance release of pack shipping RTX5 RTOS implementation for CMSIS-RTOS2 API.

Changes since RTX 5.9.0

• Add support for Dsecure="Secure-only" (#58)
• Add default name for Idle and Timer thread (#86)
• Change "Default Processor mode for Thread execution" to Privileged mode (#88)
• Update examples (#63)

CMSIS-RTX 5.9.0

Maintenance release of separate pack shipping RTX5 RTOS implementation for CMSIS-RTOS2 API.

Changes since RTX 5.8.0

• Enhance conditions to support Cortex-M52 (#38)
• Remove dependency on Device:Startup component (#39)

CMSIS-RTX 5.8.0

First release of separate pack shipping RTX5 RTOS implementation for CMSIS-RTOS2 API.

Changes since RTX 5.5.4

• Based on CMSIS-RTOS API V2.3.0 (processor affinity not supported).
• Added support for Process Isolation: MPU Protected Zones, Safety Classes, Thread Watchdogs.
• Requires CMSIS:OS Tick:SysTick component.
• Reduced component variants: Library (Library_NS replacement), Source (Source_NS replacement).
• Libraries for Arm Compiler 6 built with default wchar and enums size.
• Added pre-built libraries for GCC, CLANG and IAR.
• Removed support for legacy Arm Compiler 5.
• Fixed osMessageQueueGetSpace when called from ISR after osMessageQueuePut and before returning from ISR.
• Added de-allocation of Arm C library thread data (libspace) when thread is terminated.
• Added Thread Entry wrapper (compatible with GDB stack unwind).
• Updated SysTick implementation for OS Tick (initial count value).

Migration guide

Migration guide for projects using CMSIS v5.9.0