Warning squash

accel/tcg/log_instr.c

@@ -645,7 +645,7 @@ static void do_cpu_loglevel_switch(CPUState *cpu, run_on_cpu_data data)
     qemu_log_instr_loglevel_t prev_level = cpulog->loglevel;
     bool prev_level_active = cpulog->loglevel_active;
     qemu_log_instr_loglevel_t next_level = data.host_int;
-    bool next_level_active;
+    bool next_level_active = 0;
 
     /* Decide whether we have to pause/resume logging */
     switch (next_level) {
@@ -812,7 +812,7 @@ void qemu_log_instr_init(CPUState *cpu)
     cpu_log_instr_state_t *cpulog = &cpu->log_state;
     GArray *iinfo_ring = g_array_sized_new(FALSE, TRUE,
         sizeof(cpu_log_instr_info_t), reset_entry_buffer_size);
-    cpu_log_instr_info_t *iinfo;
+    cpu_log_instr_info_t *iinfo = NULL;
     int i;
 
     g_array_set_size(iinfo_ring, reset_entry_buffer_size);

target/arm/cheri-archspecific.h

@@ -231,7 +231,7 @@ static inline void update_next_pcc_for_tcg(CPUARMState *env,
     bool c64_changed =
         (target->_cr_cursor & 1) != ((env->pstate & PSTATE_C64) != 0);
 
-    unsigned int cur_el;
+    unsigned int cur_el = 0;
 
     env->pc.cap = *target;
     cheri_debug_assert(env->pc.cap.cr_extra == CREG_FULLY_DECOMPRESSED);

target/arm/translate-cheri.inc.c

@@ -325,7 +325,7 @@ static inline __attribute__((always_inline)) bool load_store_implementation(
         }
     }
 
-    TCGv_i64 wb;
+    TCGv_i64 wb = 0;
     // There are too many places we might accidentally add DDC base, so if we
     // are going to store back, take a copy
     if ((pre_inc || post_inc)) {
@@ -853,7 +853,7 @@ static bool cvt_impl_ptr_to_cap(DisasContext *ctx, uint32_t cd, uint32_t cn,
         tcg_gen_mov_i64(new_cursor, tcg_rm);
     }
 
-    TCGLabel *l1;
+    TCGLabel *l1 = NULL;
 
     if (zero_is_null) {
         l1 = gen_new_label();