Full project description, specifications, architecture, and implementation details are available at: https://drive.google.com/file/d/1h0KT03AcliuF-zdfoH5WrHe9L9oAnf2u/view?usp=sharing
Project Name: XPCAM – In-Memory Compute CAM for Binary Neural Networks
Design Team Identifier: XPCAM
Primary Contact Email: egarzonc@asig.com.ec Secondary Contact Email: eholguin@usfq.edu.ec
Active Design Team Members:
- Joaquin Abad
- Nicolas Yanchapaxi
- David Mendoza
- Ignacio Torres
- Pablo Nuñez
Mentor(s): Esteban Garzon, Eduardo Holguín
Country: Ecuador
Design Type: Analog / Mixed Signal
Special I/O Requirements: N/A
RTL Completed: Not applicable (Fully Analog Design)
Logic Synthesis Completed: N/A
Place-and-Route Completed: N/A
Xschem Schematic Completed: No
Total I/O Pins: 14
- 9 Digital
- 1 Analog
- 1 VDD
- 1 GND
- 1 VDDIO
- 1 VSSIO
Estimated Core Area: 0.002 mm^2
Estimated Final Area: 2000 um^2 (≈ 0.002 mm^2)
Layout Completion: 10 / 10 (≈ 100%)
Digital Blocks in RTL: Not applicable
DRC & LVS Verified Blocks: All (as for LVS, only the individual blocks)
Digital Open-Source EDA Flow Familiarity:
The USFQ VLSI team presents previous background using open-source EDA tools and digital and analog design flows. The design team is already familiar with the SkyWater 130nm PDK and standard analog full-custom workflows.