boards: embeint: kudu: added

boards/embeint/kudu/Kconfig.defconfig

@@ -0,0 +1,9 @@
+# Copyright (c) 2025 Embeint Inc
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_KUDU_NRF54L15_CPUAPP
+
+configdefault ROM_START_OFFSET
+	default 0x800 if BOOTLOADER_MCUBOOT
+
+endif # BOARD_KUDU_NRF54L15_CPUAPP

boards/embeint/kudu/Kconfig.kudu

@@ -0,0 +1,5 @@
+# Copyright (c) 2025 Embeint Inc
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_KUDU_NRF54L15_CPUAPP
+	select SOC_NRF54L15_CPUAPP if BOARD_KUDU_NRF54L15_CPUAPP

boards/embeint/kudu/board.cmake

@@ -0,0 +1,9 @@
+# Copyright (c) 2025 Embeint Inc
+# SPDX-License-Identifier: Apache-2.0
+
+if(CONFIG_SOC_NRF54L15_CPUAPP)
+	board_runner_args(jlink "--device=nRF54L15_M33" "--speed=4000")
+endif()
+
+include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/embeint/kudu/board.yml

@@ -0,0 +1,6 @@
+board:
+  name: kudu
+  full_name: Kudu CAT1 LTE Gateway
+  vendor: embeint
+  socs:
+  - name: nrf54l15

boards/embeint/kudu/doc/index.rst

@@ -0,0 +1,9 @@
+.. _board_kudu:
+
+Embeint Kudu
+############
+
+Overview
+********
+
+The Kudu hardware is a CAT 1 LTE Bluetooth gateway for high throughput applications.

boards/embeint/kudu/kudu-pinctrl.dtsi

@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2025 Embeint Inc
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	uart00_default: uart00_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 2, 2)>,
+				<NRF_PSEL(UART_RTS, 2, 5)>;
+			nordic,drive-mode = <NRF_DRIVE_E0E1>;
+		};
+
+		group2 {
+			psels = <NRF_PSEL(UART_RX, 2, 0)>,
+				<NRF_PSEL(UART_CTS, 2, 4)>;
+			bias-pull-up;
+		};
+	};
+
+	uart00_sleep: uart00_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 2, 2)>,
+				<NRF_PSEL(UART_RX, 2, 0)>,
+				<NRF_PSEL(UART_RTS, 2, 5)>,
+				<NRF_PSEL(UART_CTS, 2, 4)>;
+			low-power-enable;
+		};
+	};
+
+	spi20_default: spi20_default {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 1, 8)>,
+				<NRF_PSEL(SPIM_MOSI, 1, 14)>,
+				<NRF_PSEL(SPIM_MISO, 1, 9)>;
+			nordic,drive-mode = <NRF_DRIVE_H0H1>;
+		};
+	};
+
+	spi20_sleep: spi20_sleep {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 1, 8)>,
+				<NRF_PSEL(SPIM_MOSI, 1, 14)>,
+				<NRF_PSEL(SPIM_MISO, 1, 9)>;
+			low-power-enable;
+			bias-pull-down;
+		};
+	};
+
+	i2c21_default: i2c21_default {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SCL, 1, 11)>,
+				<NRF_PSEL(TWIM_SDA, 1, 12)>;
+		};
+	};
+
+	i2c21_sleep: i2c21_sleep {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SCL, 1, 11)>,
+				<NRF_PSEL(TWIM_SDA, 1, 12)>;
+				low-power-enable;
+		};
+	};
+};

boards/embeint/kudu/kudu_cpuapp.dts

@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <nordic/nrf54l15_cpuapp.dtsi>
+#include "kudu_cpuapp_common.dtsi"
+
+/ {
+	compatible = "embeint,kudu-cpuapp";
+	model = "Kudu CAT1 LTE Gateway Application MCU";
+
+	chosen {
+		zephyr,code-partition = &slot0_partition;
+		zephyr,sram = &cpuapp_sram;
+	};
+};
+
+&cpuapp_rram {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x0 DT_SIZE_K(64)>;
+		};
+		slot0_partition: partition@10000 {
+			label = "image-0";
+			reg = <0x10000 DT_SIZE_K(648)>;
+		};
+		slot1_partition: partition@b2000 {
+			label = "image-1";
+			reg = <0xb2000 DT_SIZE_K(648)>;
+		};
+		/* 32k from 0x154000 to 0x15bfff reserved for TF-M partitions */
+		storage_partition: partition@15c000 {
+			label = "storage";
+			reg = <0x15c000 DT_SIZE_K(36)>;
+		};
+	};
+};

boards/embeint/kudu/kudu_cpuapp.yaml

@@ -0,0 +1,22 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+identifier: kudu/nrf54l15/cpuapp
+name: Kudu CAT1 LTE Gateway
+type: mcu
+arch: arm
+toolchain:
+  - gnuarmemb
+  - zephyr
+sysbuild: true
+ram: 188
+flash: 1428
+supported:
+  - adc
+  - ble
+  - counter
+  - gpio
+  - i2c
+  - retained_mem
+  - spi
+  - watchdog

boards/embeint/kudu/kudu_cpuapp_common.dtsi

@@ -0,0 +1,203 @@
+/*
+ * Copyright (c) 2025 Embeint Inc
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* This file is common to the secure and non-secure domain */
+
+#include "kudu-pinctrl.dtsi"
+#include <zephyr/dt-bindings/battery/battery.h>
+#include <zephyr/dt-bindings/sensor/lps22hh.h>
+
+/ {
+	chosen {
+		zephyr,console = &rtt0;
+		zephyr,flash-controller = &rram_controller;
+		zephyr,flash = &cpuapp_rram;
+	};
+
+	rtt0: rtt_chan0 {
+		compatible = "segger,rtt-uart";
+		status = "okay";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		led0: led_0 {
+			gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
+			label = "Red LED";
+		};
+		led1: led_1 {
+			gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
+			label = "Green LED";
+		};
+		led2: led_2 {
+			gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
+			label = "Blue LED";
+		};
+	};
+
+	fuel_gauge: fuel_gauge {
+		compatible = "zephyr,fuel-gauge-composite";
+		source-primary = <&bq25798>;
+		device-chemistry = "lithium-ion-polymer";
+		ocv-capacity-table-0 = <BATTERY_OCV_CURVE_LITHIUM_ION_POLYMER_DEFAULT>;
+		charge-full-design-microamp-hours = <13400000>;
+		fuel-gauge-channels;
+	};
+
+	aliases {
+		led0 = &led0;
+		led1 = &led1;
+		led2 = &led2;
+		watchdog0 = &wdt31;
+		environmental0 = &sht4x;
+		imu0 = &lsm6dsv;
+	};
+};
+
+&cpuapp_sram {
+	status = "okay";
+};
+
+&lfxo {
+	load-capacitors = "internal";
+	load-capacitance-femtofarad = <9000>;
+};
+
+&hfxo {
+	load-capacitors = "internal";
+	load-capacitance-femtofarad = <9000>;
+};
+
+&regulators {
+	status = "okay";
+};
+
+&vregmain {
+	status = "okay";
+	regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
+};
+
+&grtc {
+	owned-channels = <0 1 2 3 4 5 6 7 8 9 10 11>;
+	/* Channels 7-11 reserved for Zero Latency IRQs, 3-4 for FLPR */
+	child-owned-channels = <3 4 7 8 9 10 11>;
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpiote20 {
+	status = "okay";
+};
+
+&gpiote30 {
+	status = "okay";
+};
+
+&radio {
+	status = "okay";
+};
+
+&ieee802154 {
+	status = "okay";
+};
+
+&temp {
+	status = "okay";
+};
+
+&clock {
+	status = "okay";
+};
+
+&spi20 {
+	status = "okay";
+	cs-gpios = <&gpio1 7 (GPIO_ACTIVE_LOW)>,
+		   <&gpio1 13 (GPIO_ACTIVE_LOW)>,
+		   <&gpio1 5 (GPIO_ACTIVE_LOW)>;
+	pinctrl-0 = <&spi20_default>;
+	pinctrl-1 = <&spi20_sleep>;
+	pinctrl-names = "default", "sleep";
+
+	lsm6dsv: lsm6dsv@0 {
+		compatible = "st,lsm6dsv16x";
+		status = "okay";
+		reg = <0>;
+		spi-max-frequency = <8000000>;
+		int1-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
+	};
+
+	w25q128jw: w25q128jwpim@1 {
+		compatible = "jedec,spi-nor";
+		status = "okay";
+		reg = <1>;
+		spi-max-frequency = <8000000>;
+		size = <134217728>;
+		has-dpd;
+		t-enter-dpd = <3000>;
+		t-exit-dpd = <20000>;
+		jedec-id = [ef 40 18];
+	};
+
+	sdhc0: sdhc@2 {
+		compatible = "zephyr,sdhc-spi-slot";
+		status = "okay";
+		reg = <2>;
+		spi-max-frequency = <8000000>;
+		mmc: mmc {
+			compatible = "zephyr,sdmmc-disk";
+			status = "okay";
+			disk-name = "SD";
+		};
+	};
+};
+
+&i2c21 {
+	status = "okay";
+	pinctrl-0 = <&i2c21_default>;
+	pinctrl-1 = <&i2c21_sleep>;
+	pinctrl-names = "default", "sleep";
+
+	sht4x: sht4x@44 {
+		compatible = "sensirion,sht4x";
+		status = "okay";
+		reg = <0x44>;
+		repeatability = <2>;
+	};
+
+	lps22hh: lps22hh@5d {
+		compatible = "st,lps22hh";
+		status = "okay";
+		reg = <0x5d>;
+		odr = <LPS22HH_DT_ODR_POWER_DOWN>;
+	};
+
+	bq25798: bq25798@6b {
+		compatible = "ti,bq25798";
+		status = "okay";
+		reg = <0x6b>;
+		en-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
+		int-gpios = <&gpio0 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+		ts-rt1 = <5240>;
+		ts-rt2 = <30310>;
+		mppt-ratio = <81>;
+		vac-ovp = <26>;
+		input-current-limit = <999>;
+		v-in-dpm = <3000>;
+		acdrv1-en;
+		acdrv2-en;
+	};
+};