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  • San Luis Obispo, CA

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Pinned Loading

  1. FPGA_Design FPGA_Design Public

    Verilog

  2. PedalPi PedalPi Public

    C 1

  3. RISCV_CPU_Pipepline RISCV_CPU_Pipepline Public

    SystemVerilog 1 1

  4. RISCV_SUPERSCALAR RISCV_SUPERSCALAR Public

    SystemVerilog 1 1

  5. Optimized_Sobel_Filter_RPI Optimized_Sobel_Filter_RPI Public

    C++ 1

  6. Runge_Kutta_FPGA Runge_Kutta_FPGA Public

    Verilog 3 1