The aim of the project is to create a basic calculator which takes two single-digit numbers (each is a single-digit decimal base number entered by user via switches)as input and can perform unsigned addition, subtraction, multiplication and division (only quotient) based on user selection and display the output decimal number (two digits) to the user (sign is displayed for subtraction only). This calculator is implemented in Verilog and transferred to the FPGA CYCLONE IV E Board with a 7-segment display as output and switches with LOW/HIGH for input. For multiplication repeated addition is done similarly for division repeated subtraction isimplemented. To display on the 7-Segment display the output is converted into BCD using the double-dabble algorithm.
This project contains four main blocks/modules, the main module ‘pro’, the user input loading and display block ‘inputfunction’, the operation selection and result calculation block ‘functions’ and the display function to convert binary result into BCD (Binary Coded Decimal) and display each digit on the seven-segment display.Both dataflow and behaviouralmodellingare used in this project. The user input function gathers the input decimal number from the user and loads it to registers a and b respectively after the user toggles the switches assigned to ‘loada’ (Switch 10) and ‘loadb’ (Switch 11) respectively. Each switch from switch 0 to 9 is assigned to the bits ofthe register num. Thus, when a user toggles a switch between 0 to 9 and toggles the load switch, the data is stored into the registers a and b as binary equivalent of decimals (1-9) respectively.
Then this data is transferred to display function through the main function where the inputs a and b are displayed to the user on the seven-segment display.In the ‘functions’ module, the four operations unsigned addition, subtraction, multiplication, and division takes place. The user selects the desired operation by toggling the switches (addition), (subtraction), (multiplication) and (division) after loading the desired input.The addition is done by data flow method where the two binary values a and b are added using ‘+’ operator, similarly, for multiplication and division the data flow operators ‘*’ and ‘/’ is used and the register neg is stored with the value 0.For subtraction, if the b>a, then neg is stored with value 1 and the operation b-a takes place else normal operation a-b takes place with neg stored with 0.Finally, in the main function, the display function is called again and the result is displayed in 7 segment display by passing the binary value to ‘outputresbin’ along with ‘rst’ reset state and ‘neg’ negative number state.In the display function, the 8-bit binary result is converted into BCD (Binary coded decimal) form for displaying the result digit wise on the seven-segmentdisplay. This is achieved using the double dabble algorithm. It is also known as the shift-and-add-3 algorithm. It takes amaximum of 4 bits in binary to store each decimal digit. The number to be converted is stored in a register that is 8 bits wide. We create a temporary register wide enough to hold both the original number and its BCD representation which will ben+ 4×ceil(n/3) bits long where n is the bit length of the number to be converted.In this case the temporary register should be 8+12 bits wide but since the theoretical maximum output possible by multiplying two single-digit decimal numbers is 81 which can be represented in two BCD digits, we restrict the temporary register length to 8+8 (16 bit) length. The number to be converted is stored in the right side [7:0] of the temporary register.In this algorithm, we run a loop for n times (8 in this case) wherein each iteration we shift the entire contents of the temporary register to left by one bit. The left side of the register is divided into 4-bit parts which represent a single digit in BCD form. When the contents of the BCD digits (at ones or hundreds place) valueis equal to or greater than 5 the digit is added with 3 and shifted to left by 1 bit and iteration continues.Then the contents of temporary variable from [15:12] is stored in bcd2 which stores the hundreds digit binary value and temporary variable from [12:8] stores the ones digit binary values and is stored in bcd1 variable.
n the display function bcd1 and bcd2 are converted into a 7-bit binary for displaying their value in 7 segment display using case statement. The display is on by default and to switch off a segment a high (1) value must be specified in the 7-bit binary value assigned to the digit.The 7-segment display segment positionmap is as follows