KaidenHsu

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Kaiden KaidenHsu

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An Electrical Engineering (SoC subgroup) graduate, studying system architecture design and digital IC design in "System Co-Design Lab" at NSYSU, Taiwan.

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Kaohsiung, Taiwan
18:51 (UTC +08:00)
in/hong-yu-hsu-a8a9b6361

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KaidenHsu/README.md

Hi there, I'm Kaiden! 👋

🏫 master: Electrical Engineering (SoC subgroup) @ NSYSU, Taiwan (System Co-Design Lab)
- research focus: combine system design, FPGA acceleration, digital IC design with biomedical applications
- tools: Gem5, Alveo U250 FPGA
- keywords: domain specific architecuture (DSA), electronic system level (ESL), digital IC design, FPGA prototyping, system design, hardware-software co-design
🏫 bachelor: Computer Science (AI subgroup) @ NCCU, Taiwan
📧 reach out to me: email
🎯2026 goal: familiarizing myself with ESL methodology and the VLSI backend flow

🔨 Skillset

📈 GitHub Stats

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STN-Network STN-Network Public

Forked from hankshyu/STN-Network

Code to my ISASD, 2024 paper "An Improved Spatial Transformer Network based on Lightweight Localization Net (L-STN)"

Jupyter Notebook 1
Back-Angle-Measurement-Using-YOLOv8 Back-Angle-Measurement-Using-YOLOv8 Public

Code to my IJETI, 2026 paper "Real-Time Video-Based Measurement of Back Angles Using YOLOv8 and Edge Detection for Strength Training"

Python
DLab DLab Public

An implementation-oriented digital FPGA design course in NYCU

VHDL
ICLab ICLab Public

A digital IC design course implemented on FPGA in NYCU.

Verilog 1
Digital-Systems-Design Digital-Systems-Design Public

An advanced NYCU course on digital design on FPGAs

Verilog
NCCU-NSYSU-Courses NCCU-NSYSU-Courses Public

Forked from hankshyu/NYCU-NTU-Course-Archive

Course info and slides for my courses in NCCU and NSYSU, Taiwan.

HTML 1