Optimized Intrinsics based AIE Programming

Roadmap:

• Minimal GemV intrinsic for int16 with python golden model
• int8 GemV
• int32 GemV
• GeMV(K,N, x_dtype, w_dtype, y_dtype) python class to generate kernel code
• GeMM by intrinsics
• GeMM() class to generate kernel code
• Support any sizes for inputs & outputs
• Conv() class
• Dense() class creates and connects multiple GeMM(...) objects with equal II
• NN() class creates and connects multiple Dense() and Conv() classes
• Integrate with hls4ml as limited backend

How to Run:

In waiter, do:

source /tools/Xilinx/Vivado/2024.1/settings64.sh && source /opt/xilinx/xrt/setup.sh
export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/opt/xilinx/xrt/lib:/tools/Xilinx/Vitis/2024.1/aietools/lib/lnx64.o

To run simulation, enter a directory and

make clean
make analyze

Important Links:

• Versal ACAP Architecture Manual
• Kernel Coding with Intrinsics User Guide
• Xilinx Intrinsics User Guide
• Kernel (API) + Graph Coding for basic dense layer with weights on chip
• Working intrinsics example