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cb1adde
pwm 50% duty cycle 1khz
alicedimauro May 25, 2026
e91aa86
test
alicedimauro May 25, 2026
91e0fda
bse 3 and shutdown sensing 11-15
alicedimauro May 25, 2026
af823b3
10khz still not working
alicedimauro May 25, 2026
0a8a20a
sense lv voltage
alicedimauro May 31, 2026
9b237fb
doesnt work
matt-mekha May 31, 2026
041bf4a
Merge branch 'main' into ad/pdu-linelock
alicedimauro May 31, 2026
f491de2
Add VCU regen linelock control
May 25, 2026
63cb72f
Tune linelock regen speed threshold
May 25, 2026
1426fa4
Set linelock reset pressure to 100 psi
May 31, 2026
8815235
Add pressure-only linelock test mode
May 31, 2026
694f950
Lower linelock regen reference torque
May 31, 2026
2bd101c
Raise linelock regen reference torque to 60 Nm
May 31, 2026
4f1950b
Restore linelock regen reference torque
May 31, 2026
2d100b8
Restore linelock regen safety gates
May 31, 2026
d6ea609
Refine linelock regen safety gates
May 31, 2026
b0ce9bf
toggle every 5s
alicedimauro May 31, 2026
b84cbaf
Route linelock command through VCU State
May 31, 2026
4dc8a7a
Align linelock PDU output naming
May 31, 2026
80a2268
Add linelock pedal torque release threshold
May 31, 2026
9135b5e
Use working dfu-util fallback on macOS
May 31, 2026
783a79a
Remove PDU linelock changes from VCU branch
May 31, 2026
3fbc1bb
enable from CAN
matt-mekha May 31, 2026
a3926db
Guard regen behind linelock command delay
May 31, 2026
1f1ba7c
Align linelock regen timing with PDU
May 31, 2026
d62232b
Set linelock regen delay to 200ms
May 31, 2026
1c16cad
Reduce regen bringup torque
May 31, 2026
1d3c2e0
Use max OCV for SOE estimate
May 31, 2026
660758f
Require valid inverter current for battery OCV
May 31, 2026
95e462e
Revert "Require valid inverter current for battery OCV"
May 31, 2026
e08056e
battery voltage debounce
matt-mekha May 31, 2026
7f2842c
Merge branch 'codex/vcu-linelock-regen' of https://github.com/Longhor…
matt-mekha May 31, 2026
2d9c1fe
Merge branch 'ad/pdu-linelock' into codex/vcu-linelock-regen
matt-mekha May 31, 2026
3982ea2
Preclose linelock below torque cutoff
May 31, 2026
1285669
Pulse linelock open on pedal torque edge
May 31, 2026
326a886
Cancel linelock pulse on throttle lift
Jun 1, 2026
804e893
Set regen torque target to 67 Nm
Jun 1, 2026
e4871fb
send bse3
matt-mekha Jun 1, 2026
405031c
Merge branch 'codex/vcu-linelock-regen' of https://github.com/Longhor…
matt-mekha Jun 1, 2026
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4 changes: 4 additions & 0 deletions PDU/firmware/Core/Inc/adc.h
Original file line number Diff line number Diff line change
Expand Up @@ -34,11 +34,15 @@ extern "C" {

extern ADC_HandleTypeDef hadc3;

extern ADC_HandleTypeDef hadc5;
extern DMA_HandleTypeDef hdma_adc5;

/* USER CODE BEGIN Private defines */

/* USER CODE END Private defines */

void MX_ADC3_Init(void);
void MX_ADC5_Init(void);

/* USER CODE BEGIN Prototypes */

Expand Down
25 changes: 25 additions & 0 deletions PDU/firmware/Core/Inc/dma.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file dma.h
* @brief This file contains all the function prototypes for
* the dma.c file
******************************************************************************
*/
/* USER CODE END Header */
#ifndef __DMA_H__
#define __DMA_H__

#ifdef __cplusplus
extern "C" {
#endif

#include "main.h"

void MX_DMA_Init(void);

#ifdef __cplusplus
}
#endif

#endif /* __DMA_H__ */
16 changes: 16 additions & 0 deletions PDU/firmware/Core/Inc/main.h
Original file line number Diff line number Diff line change
Expand Up @@ -69,6 +69,8 @@ void Error_Handler(void);
#define SW_BOARDS_GPIO_Port GPIOC
#define SW_FANS_Pin GPIO_PIN_3
#define SW_FANS_GPIO_Port GPIOC
#define Line_Lock_EN_Pin GPIO_PIN_2
#define Line_Lock_EN_GPIO_Port GPIOF
#define PWM_TSSI_R_Pin GPIO_PIN_0
#define PWM_TSSI_R_GPIO_Port GPIOA
#define PWM_BRAKEL_Pin GPIO_PIN_1
Expand All @@ -79,6 +81,20 @@ void Error_Handler(void);
#define SNS_TSSI_G_GPIO_Port GPIOB
#define ST_TSSI_G_Pin GPIO_PIN_15
#define ST_TSSI_G_GPIO_Port GPIOE
#define SDWN_12_Sense_Pin GPIO_PIN_14
#define SDWN_12_Sense_GPIO_Port GPIOB
#define SDWN_13_Sense_Pin GPIO_PIN_15
#define SDWN_13_Sense_GPIO_Port GPIOB
#define SDWN_11_Sense_Pin GPIO_PIN_8
#define SDWN_11_Sense_GPIO_Port GPIOD
#define SDWN_15_Sense_Pin GPIO_PIN_9
#define SDWN_15_Sense_GPIO_Port GPIOC
#define SDWN_1_Sense_Pin GPIO_PIN_8
#define SDWN_1_Sense_GPIO_Port GPIOA
#define BSE_3_Pin GPIO_PIN_9
#define BSE_3_GPIO_Port GPIOA
#define SDWN_14_Sense_Pin GPIO_PIN_15
#define SDWN_14_Sense_GPIO_Port GPIOA
#define SW_BATT_FANS1_Pin GPIO_PIN_4
#define SW_BATT_FANS1_GPIO_Port GPIOB
#define SW_BATT_FANS2_Pin GPIO_PIN_5
Expand Down
7 changes: 4 additions & 3 deletions PDU/firmware/Core/Inc/stm32g4xx_it.h
Original file line number Diff line number Diff line change
Expand Up @@ -50,9 +50,10 @@ void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void DebugMon_Handler(void);
void USB_LP_IRQHandler(void);
void UsageFault_Handler(void);
void DebugMon_Handler(void);
void DMA2_Channel2_IRQHandler(void);
void USB_LP_IRQHandler(void);
void FDCAN1_IT0_IRQHandler(void);
void FDCAN1_IT1_IRQHandler(void);
void TIM20_UP_IRQHandler(void);
Expand Down
156 changes: 153 additions & 3 deletions PDU/firmware/Core/Src/adc.c
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,9 @@

/* USER CODE END 0 */

ADC_HandleTypeDef hadc3;
ADC_HandleTypeDef hadc3;
ADC_HandleTypeDef hadc5;
DMA_HandleTypeDef hdma_adc5;

/* ADC3 init function */
void MX_ADC3_Init(void)
Expand Down Expand Up @@ -89,6 +91,71 @@ void MX_ADC3_Init(void)
/* USER CODE END ADC3_Init 2 */

}
/* ADC5 init function */
void MX_ADC5_Init(void)
{

/* USER CODE BEGIN ADC5_Init 0 */

/* USER CODE END ADC5_Init 0 */

ADC_ChannelConfTypeDef sConfig = {0};

/* USER CODE BEGIN ADC5_Init 1 */

/* USER CODE END ADC5_Init 1 */

/** Common config
*/
hadc5.Instance = ADC5;
hadc5.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
hadc5.Init.Resolution = ADC_RESOLUTION_12B;
hadc5.Init.DataAlign = ADC_DATAALIGN_RIGHT;
hadc5.Init.GainCompensation = 0;
hadc5.Init.ScanConvMode = ADC_SCAN_ENABLE;
hadc5.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
hadc5.Init.LowPowerAutoWait = DISABLE;
hadc5.Init.ContinuousConvMode = DISABLE;
hadc5.Init.NbrOfConversion = 2;
hadc5.Init.DiscontinuousConvMode = DISABLE;
hadc5.Init.ExternalTrigConv = ADC_SOFTWARE_START;
hadc5.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
hadc5.Init.DMAContinuousRequests = ENABLE;
hadc5.Init.Overrun = ADC_OVR_DATA_PRESERVED;
hadc5.Init.OversamplingMode = DISABLE;
if (HAL_ADC_Init(&hadc5) != HAL_OK)
{
Error_Handler();
}

/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_1;
sConfig.Rank = ADC_REGULAR_RANK_1;
sConfig.SamplingTime = ADC_SAMPLETIME_247CYCLES_5;
sConfig.SingleDiff = ADC_SINGLE_ENDED;
sConfig.OffsetNumber = ADC_OFFSET_NONE;
sConfig.Offset = 0;
if (HAL_ADC_ConfigChannel(&hadc5, &sConfig) != HAL_OK)
{
Error_Handler();
}

/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_2;
sConfig.Rank = ADC_REGULAR_RANK_2;
if (HAL_ADC_ConfigChannel(&hadc5, &sConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN ADC5_Init 2 */

/* USER CODE END ADC5_Init 2 */

}

static uint32_t HAL_RCC_ADC345_CLK_ENABLED=0;

void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
{
Expand All @@ -111,7 +178,10 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
}

/* ADC3 clock enable */
__HAL_RCC_ADC345_CLK_ENABLE();
HAL_RCC_ADC345_CLK_ENABLED++;
if(HAL_RCC_ADC345_CLK_ENABLED==1){
__HAL_RCC_ADC345_CLK_ENABLE();
}

__HAL_RCC_GPIOB_CLK_ENABLE();
/**ADC3 GPIO Configuration
Expand All @@ -126,6 +196,59 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)

/* USER CODE END ADC3_MspInit 1 */
}
else if(adcHandle->Instance==ADC5)
{
/* USER CODE BEGIN ADC5_MspInit 0 */

/* USER CODE END ADC5_MspInit 0 */

/** Initializes the peripherals clocks
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC345;
PeriphClkInit.Adc345ClockSelection = RCC_ADC345CLKSOURCE_SYSCLK;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}

/* ADC5 clock enable */
HAL_RCC_ADC345_CLK_ENABLED++;
if(HAL_RCC_ADC345_CLK_ENABLED==1){
__HAL_RCC_ADC345_CLK_ENABLE();
}

__HAL_RCC_GPIOA_CLK_ENABLE();
/**ADC5 GPIO Configuration
PA8 ------> ADC5_IN1
PA9 ------> ADC5_IN2
*/
GPIO_InitStruct.Pin = SDWN_1_Sense_Pin|BSE_3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

/* ADC5 DMA Init */
/* ADC5 Init */
hdma_adc5.Instance = DMA2_Channel2;
hdma_adc5.Init.Request = DMA_REQUEST_ADC5;
hdma_adc5.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_adc5.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_adc5.Init.MemInc = DMA_MINC_ENABLE;
hdma_adc5.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_adc5.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
hdma_adc5.Init.Mode = DMA_CIRCULAR;
hdma_adc5.Init.Priority = DMA_PRIORITY_MEDIUM;
if (HAL_DMA_Init(&hdma_adc5) != HAL_OK)
{
Error_Handler();
}

__HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc5);

/* USER CODE BEGIN ADC5_MspInit 1 */

/* USER CODE END ADC5_MspInit 1 */
}
}

void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
Expand All @@ -137,7 +260,10 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)

/* USER CODE END ADC3_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_ADC345_CLK_DISABLE();
HAL_RCC_ADC345_CLK_ENABLED--;
if(HAL_RCC_ADC345_CLK_ENABLED==0){
__HAL_RCC_ADC345_CLK_DISABLE();
}

/**ADC3 GPIO Configuration
PB0 ------> ADC3_IN12
Expand All @@ -148,6 +274,30 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)

/* USER CODE END ADC3_MspDeInit 1 */
}
else if(adcHandle->Instance==ADC5)
{
/* USER CODE BEGIN ADC5_MspDeInit 0 */

/* USER CODE END ADC5_MspDeInit 0 */
/* Peripheral clock disable */
HAL_RCC_ADC345_CLK_ENABLED--;
if(HAL_RCC_ADC345_CLK_ENABLED==0){
__HAL_RCC_ADC345_CLK_DISABLE();
}

/**ADC5 GPIO Configuration
PA8 ------> ADC5_IN1
PA9 ------> ADC5_IN2
*/
HAL_GPIO_DeInit(GPIOA, SDWN_1_Sense_Pin|BSE_3_Pin);

/* ADC5 DMA DeInit */
HAL_DMA_DeInit(adcHandle->DMA_Handle);

/* USER CODE BEGIN ADC5_MspDeInit 1 */

/* USER CODE END ADC5_MspDeInit 1 */
}
}

/* USER CODE BEGIN 1 */
Expand Down
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