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Test hw-flow-control with zephyrproject-rtos#87642.

There are no devices which can support this available.

Add Asynchronous UART implementation, which does not drop data
when automatic hardware-flow-control is set in the device tree.

With automatic hardware flow control, the CTS pin will be
automatically deactivated when there are no more asynchronous
UART RX buffers available. After buffer space becomes available,
and UART RX is restarted, the CTS pin will be activated.

Signed-off-by: Markus Lassila <[email protected]>
Signed-off-by: Markus Lassila <[email protected]>
@MarkusLassila MarkusLassila force-pushed the zephyr-ppp-fix-upstream branch from 91d81e5 to 23a3b09 Compare April 3, 2025 11:14
@MarkusLassila MarkusLassila force-pushed the zephyr-ppp-fix-upstream branch 9 times, most recently from 307bdc1 to e7dfa4c Compare May 5, 2025 09:59
MarkusLassila pushed a commit that referenced this pull request May 20, 2025
Current code does not build on Cortex-M0, seems like it does not like
subs:

Error: instruction not supported in Thumb16 mode -- `subs r3,#1'

Adding a unified assembler language declaration in the snippet seems to
fix the problem, also add an M0+ board so this is tested in CI.

Signed-off-by: Fabio Baltieri <[email protected]>
MarkusLassila pushed a commit that referenced this pull request Jun 27, 2025
Add possibility to perform crop on all pipes and compose (downscale) on
pixel pipes (endpoint #1 and endpoint zephyrproject-rtos#2).
Rework the code in order to move the downscale control from
the set_fmt into the set_selection (compose).

Signed-off-by: Alain Volmat <[email protected]>
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2 participants