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mb/google/puff: optional uefi-16MiB.fmd for iPXE builds#42

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mb/google/puff: optional uefi-16MiB.fmd for iPXE builds#42
jackadam1981 wants to merge 53 commits into
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@jackadam1981 jackadam1981 commented Jun 28, 2026

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Depends on: #41 (Kaisa Chromebox ACPI/PCI hide).
GitHub base: MrChromebox-2606 — diff shows 2 commits until #41 merges; please review only the iPXE commit (aa119e, 3 files). Will rebase after #41 lands.

Summary

Enable optional iPXE for Puff/Kaisa UEFI builds: when CONFIG_EDK2_ENABLE_IPXE is set, select a dedicated flash map (uefi-16MiB.fmd) that fits the larger iPXE payload; when iPXE is off, nothing changes — upstream auto-FMAP and 2606 behavior are untouched.

iPXE integration was debugged and validated on real hardware; abandoning the layout work would waste that effort. Making the partition map opt-in via existing Kconfig (EDK2_ENABLE_IPXE) keeps the change isolated: no impact on ChromeOS builds, non-iPXE UEFI builds, or other Puff SKUs unless they explicitly enable iPXE.

Standard PXE (SNP/RtkUndi), EC/RTC/fan baseline, and sleep profiles are separate follow-up PRs.

Why optional FMD (not always-on)

Concern Answer
Does this affect all Puff boards? No. FMDFILE switches only when EDK2_ENABLE_IPXE is enabled.
Does this affect builds without iPXE? No. Empty FMDFILE → Makefile auto-FMAP, same as 2606 today.
Why a custom .fmd at all? iPXE needs RW_LEGACY + SMMSTORE space that auto-FMAP does not reserve; layout also keeps MRC/SPD cache in RW_MISC with (PRESERVE).
Why upstream instead of fork-only? The Kconfig gate matches upstream patterns; other boards can reuse the same .fmd + one FMDFILE line if they enable iPXE.

Design

Piece Role
uefi-16MiB.fmd Optional layout: RW_LEGACY (512 KiB) + SMMSTORE (512 KiB) + preserved RW_MISC (MRC/SPD)
puff/Kconfig FMDFILE default ".../uefi-16MiB.fmd" if BOARD_ROMSIZE_KB_16384 && !CHROMEOS && EDK2_ENABLE_IPXE
config.kaisa.uefi CONFIG_EDK2_ENABLE_IPXE=y — example defconfig for Kaisa; other boards enable via menuconfig / their defconfig

MRC note: First flash after switching from auto-FMAP to this layout may run one full memory training (offset change). Later boots reuse RW_MRC_CACHE in RW_MISC.

Files changed (3, +34 lines)

File Change
configs/cml/config.kaisa.uefi CONFIG_EDK2_ENABLE_IPXE=y
src/mainboard/google/puff/Kconfig Optional FMDFILE for iPXE
src/mainboard/google/puff/uefi-16MiB.fmd New layout file

Testing (Kaisa only — single DUT)

Device: Acer Chromebox CXI4 (Kaisa) — the only hardware available.

ROM: pr/2-puff-ipxe on top of #41, flashed as linux_v0.2.1.rom (Alpine USB menu 3).

Check Result
check-build-log-pxe.sh PASS — external iPXE included; NETWORK_IPXE=TRUE
cbfstool layout PASS — RW_LEGACY, SMMSTORE, RW_MRC_CACHE, RW_SPD_CACHE
kaisa-pr1-hide-accept.sh after flash pass=7 fail=0 — #41 hide still effective
Boot to Linux OK
UEFI «iPXE Network Boot» Verified manually

Evidence: fork parent repo artifacts/kaisa-pr2-ipxe-20260628/.

Not tested: non-Kaisa Puff SKUs; PXE+iPXE mixed defconfig; Windows.

Out of scope

  • PR3: EC/RTC/fan, power-off-after-AC-loss, standard PXE defconfig
  • PR4: S0ix / S3 sleep profile
  • PL1 / PXE Makefile cleanup

Checklist

MrChromebox and others added 30 commits June 14, 2026 21:57
@MrChromebox
.gitmodules: use personal fork of blobs repo
818bd4d 
Change-Id: Ia95041edfd731dc115826788f3090e10a2f48fb4
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
3rdparty/blobs: Update to main/HEAD
6fe810d 
Update to commit
d5595eda4766403cf7425fc71d7dc7c41fb1a208
mb/google/volteer: Update ECRW with fixed TBT5 builds

Change-Id: Iaa9a2e7b672271b287711e849de06be3519ff013
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
ec/chromeec: don't compress ecrw image
5cb674c 
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
ec/google/chromeec: Implement EC software sync V3
3b0cc15 
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
ec/chromeec/ec_lpc: increase cmd retry delay to 5us
410b91b 
Change-Id: I7f16f17273b4687ada653c3c160879e048f34b4a
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
ec/chromeec: revert keyboard backlight detection
0cc20db 
Recent changes to allow for dynamic detection of keyboard backlight
broke functionality on older/legacy devices, particularly under
Windows. Until a better solution found, revert to previous behavior.

Change-Id: I30fcffb1cde0310660f1b6f97f55203d14586268
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
ec/google/chromeec: Hack KBLT for coolstar's Windows driver
ebac42c 
coolstar's Windows driver needs KBLT under CREC, so the EC driver
loads first / KBLT is a dependent of CREC, but doesn't use the
KBQC/KBCM methods. The Linux driver needs KBLT directly under _SB.
Hack the driver to hell to make everyone happy.

Change-Id: I0ef5d6998b65d5aa7f6e8337f886ab88f178c75b
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
ec/google/chromeec: drop SYNC IRQ for CREC device
626c85a 
Breaks coolstar's Windows driver, not used by Linux

Change-Id: I5d05b9fae7e04b3714862ed905e9143fb6f9c629
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@movr4x @MrChromebox
ec/google/chromeec: Add support for After G3 State
6b2f735 
Allows to selectively enable After G3 State syncing, which can be
used to sync coreboot user selected after G3 behavior (CFR) to
ChromeEC at boot via custom host command EC_CMD_AFTER_G3_STATE.

Without this, ChromeEC will always use default compiled after G3
behavior (usually "Previous State").

Tested on FIZZ/SION.

Change-Id: I301c5d787602e2096e782a8ece7948151c8921b7
Signed-off-by: Lukasz Kutyla <9387698+movr4x@users.noreply.github.com>
@MrChromebox
nb/intel/snb: hide DPTF ACPI device
dcab706 
Change-Id: Ic1456662f44424b27cd7cb3c8174b4aad5b5980c
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@hitech95 @MrChromebox
mb/google/slippy: Enable LTE PCIe on NGFF socket and SIM USB
45dce49 
The Acer C720(P) has been designed to have a LTE modem on a NGFF connector.

Unfortunately the final revision of this chromebook doesn't have the connector
populated, for this reason on coreboot this functionality is not present.

Adding back this feature is not easy, but not impossible.
This is a first path to:
 - Enable the USB port on the SIM tray. (USB MrChromebox#5)
 - Enable the PCIE_2 to provide a full working M.2 connector.

The NGFF connector have the following features:
 - USB 2.0
 - UIM
 - PCIE 1x

On the mainboard there are a few component that are not populated
some of those can be easily soldered (Like the NGFF connector) others
can be added as daughter board.

Most of the work must be done on the Power Gate. Like bypass capacitors.
Looks like that all the 10K pullups and 0Ohm links are present in the board.

The SIM tray socket is not populated, the part no. is unknown for that reason I have
made a custom board with all the required components.

This NGFF may be used to add more storage to the chromebook.

Change-Id: I9c8392cc1ac7b78ba6f41b04f9457f1580f5aacd
Signed-off-by: Nicolò Veronese <nicveronese@gmail.com>
@MrChromebox
mb/google/peppy: Add ACPI for ambient light sensor
0cddba6 
Change-Id: Ie33c0635f4ab983f9831fd8a064f13db75f890cb
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
soc/intel/baytrail: use SMM to toggle ACPI/PCI mode for eMMC
a493f80 
Add one SMM method and modify an existing one to allow payload
(Tianocore) to toggle the eMMC from ACPI mode to PCI mode in
order to enable use as boot device, then back to ACPI mode
before the OS loads

Change-Id: Ic3885d45a9c72bfc5f16ec52b788393ef0c76150
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
soc/intel/baytrail: don't (really) put eMMC in ACPI mode
f55f252 
Let edk2 do the last steps of putting the eMMC into
APCI mode, so that it can still be detected as a boot device.

Change-Id: I560a810a9524a7bc42b27a0d3b807c9492e70f12
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
mb/google/cyan: Disable DPTF
6b468c4 
Disable since the drivers don't seem to work properly under Windows

TEST=build/boot Windows on google/cyan (edgar).

Change-Id: Ibcbb302a7eba09673078aa9699f6b843770b05e4
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
mb/google/fizz: Use automatic fan control
7ee30f0 
Change-Id: I15925997bf4d6cb83c0b84ba929901703bd550bd
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@movr4x @MrChromebox
mb/google/fizz: Select EC_GOOGLE_CHROMEEC_AFTER_G3_STATE
ec0b223 
Select EC_GOOGLE_CHROMEEC_AFTER_G3_STATE when CFR is used, in
order to ensure that the power-on-after-fail behavior works as
intended.

Tested on FIZZ/SION.

Signed-off-by: Lukasz Kutyla <9387698+movr4x@users.noreply.github.com>
@MrChromebox
mb/google/hatch/var/*: disable pen wakeup
12581fd 
ACPI breaks Windows, causes BSOD

Change-Id: Idc65d1dc78355113af1605d966066ab30f91bb5a
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@ellyq @MrChromebox
mb/google/hatch/kohaku: Raise PL1 to 12W
cd1e64d 
Kohaku is unusable with stock Power Limit under AltOS.
According to our thermal testing, this is the maximum safe value for
fanless i5-10210U.

Signed-off-by: Alicja Michalska <ahplka19@gmail.com>
@MrChromebox
mb/google/brya/osiris: Adjust power levels
69cca68 
Adjust power levels based on user feedback.

Change-Id: I1fddfd9816207af3e4f89b5ba5b8171db28cc111
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
mb/google/kahlee: Use LEVEL (vs EDGE) triggering for touchscreen IRQs
1d95aea 
Change-Id: I7475d7483d7e22e88785ff48eb6566f7fac5cc4d
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
mb/google/kahlee: Drop TP wake register
b8ad3a3 
Causes Windows to BSOD

Change-Id: I9052572ae71d650c27f65a495b0d1bf79289f2d1
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
mb/google/zork: Don't select VBOOT by default
9866532 
Now that we have a PSP bootloader which doesn't require vboot to boot,
deselect vboot by default.

TEST=build/boot google/zork (morphius) without vboot enabled.

Change-Id: Ie03e536411e1f482b4496b14e0062432c86937bc
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
Revert: "mb/google/guybrush: Enable power resource for BT"
e21f864 
This causes Windows to continually disconnect/re-enumerate the BT USB device.

Change-Id: I7201f6fd04f32ef441f1b1d858d2534bc45110db
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
Revert: "mb/google/skyrim: Fix Bluetooth configuration"
fdd4050 
This reverts commit 3804114

as it  Windows to continually disconnect/re-enumerate the BT USB device.

Change-Id: I05d2885f52f04794dbf91c150b7a6b7a7fde4387
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@coolstar @MrChromebox
soc/amd/common/acpi/upep: Fix UUID conditional and add notifications
49a3a10 
required for Windows Modern Standby notifications

Fix UUID conditionals since they were failing in Windows (as observed
from ACPI tracing)

Add definitions for display and modern standby notifications, and add
notifications to the EC for entering/exiting low power state

Test: build/boot Win11 on frostflow w/ latest EC drivers. Click "Sleep"
from start menu and observe keyboard backlight switches off.

Change-Id: Ie3adf74c613ae2a00a3e8fa6707c40ff2c6b3401
Signed-off-by: CoolStar <coolstarorganization@gmail.com>
@MrChromebox
security/tpm: Add Kconfig to allow payload control of TPM
38f4c21 
Normally, coreboot will force activate/enable the TPM if
TPM_DEACTIVATE is not selected, but this is not desireable
in the case that the payload needs to be able to control
activation/deactivation/take ownership etc.

Change-Id: Ieb7db109cbcc1a0166d95b6130b624b635bb7ac9
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
payloads: set edk2 as default x86 payload
d228b83 
Change-Id: I3e6f364c7dd0a11171754729a72f75d252105241
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
payloads/edk2: Add Kconfig to enable PXE network booting
24389f8 
Default to N since it seems to break USB booting on some devices
when the edk2 GOP driver is used.

Change-Id: I6d97029c648523858dd57a3a6211f79ad95bdb0e
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
mb/google/*: Add GOOG0005 as CID for SPI-attached CR50 TPM
5b830ff 
Enables coolstar's Windows drivers to automatically attach.

Change-Id: Ifbd47b5f35169b8d11284b2a85b11deed30c8ec9
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
MrChromebox and others added 23 commits June 14, 2026 21:58
@MrChromebox
util/lint: drop site-local check
82bcf19 
Change-Id: If1f4ffc186e978004b1b14f1238a9691d1670d97
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
ec/google/chromeec: Hook up EC sync, RW jump to option API
3ccc6dc 
Allow EC sync and RW jump functionality to be controlled via user setup
options.

Change-Id: I270060b7516da193c8fc71957a54cc710d10918c
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
ec/google/chromeec: Add CFR objects for EC Sync, RW jump options
4df53ef 
Change-Id: I1a9e59885afad72c371a707ac7de177f3e807704
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
mb/google/*: Add EC sync CFR options
54377e9 
Change-Id: Idf799739ca7060fa3b3edfe85597701ac50862ea
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
mb/google: Set s0ix_enable false for pre-TGL platforms
4c39947 
Change-Id: I2c5019f4dd15aadc7c853af0bc3aa79c7b590587
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
drv/intel/mipi_camera: Add PMIC for MIPI camera SSDT generator
1b14d28 
Change-Id: I35b9b47702d9046ef6bff2ec22da46dea8f5f5f5
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
drivers/intel/mipi_camera: Add support for ACPI _DEP to use PMIC
6a3b388
@MrChromebox
mb/google/poppy/var/nautilus: Configure camera for Windows/Linux ACPI…
f485b20 
… mode

Update device tree and Kconfig to support Windows/Linux ACPI camera mode
using the ACPI device type selection feature:

Kconfig:
- Add DRIVERS_GFX_GENERIC to baseboard
- Add/Enable DRIVERS_INTEL_MIPI_CAMERA only for non-ChromeOS builds
- Enable VARIANT_HAS_CAMERA_ACPI only for ChromeOS builds

Devicetree:
- Remove legacy static display configuration
- Add GFX generic driver with LCD0 panel and SKC0 device for IPU
- Add MIPI camera chip driver with:
  - TPS68470 PMIC device with power resource
  - Sony IMX258A camera sensor

This enables proper camera and IPU enumeration under Windows/Linux
using the standard driver stack.

TEST=build/boot Windows/Linux on google/nautilus, verify MIPI camera
functional under both OSes.

Change-Id: I59cc6f0885593a7f0985ba1cdb086f693b489fc8
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
mb/google/poppy/var/atlas: Configure camera for Windows/Linux ACPI mode
a91ad38 
Update device tree and Kconfig to support Windows/Linux ACPI camera mode
using the ACPI device type selection feature:

 Kconfig:
 - Add/Enable DRIVERS_INTEL_MIPI_CAMERA only for non-ChromeOS builds
 - Enable VARIANT_HAS_CAMERA_ACPI only for ChromeOS builds

 Devicetree:
 - Remove legacy static display configuration
- Add GFX generic driver with LCD0 panel and SKC0 device for IPU
- Add MIPI camera chip driver with Sony IMX208 camera sensor

This enables proper camera and IPU enumeration under Windows/Linux
using the standard driver stack.

TEST=build/boot Windows/Linux on google/atlas, verify MIPI camera
functional under both OSes.

Change-Id: I2f4cdf23716ffaea00d42f5b1b46cd82e4dc56aa
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
mb/google/poppy/var/soraka: Configure cameras for Windows/Linux ACPI …
1d24287 
…mode

Update device tree and Kconfig to support Windows/Linux ACPI camera mode
using the ACPI device type selection feature (commit c5fc7ab):

Kconfig:
- Enable DRIVERS_INTEL_MIPI_CAMERA only for non-ChromeOS builds
- Enable VARIANT_HAS_CAMERA_ACPI only for ChromeOS builds

Devicetree:
- Remove legacy static display configuration
- Add GFX generic driver with LCD0 panel and SKC0 for IPU
- Add TPS68470 PMIC device
- Add OV 13858 rear camera
- Add OV 5670 front camera
- Move i2c4 device reference before i2c5

This enables proper camera and IPU enumeration under Windows/Linux
using the standard driver stack.

TEST=build/boot Windows/Linux on google/soraka, verify cameras and IPU
functional under both OSes.

Change-Id: I9e62c5a36c4d1e345f20a7a5341de3c59558f761
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>

Change-Id: I9e62c5a36c4d1e345f20a7a5341de3c59558f761
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
site-local: add Kconfig overrides
88b0f65 
Change-Id: Ia7d57921c002b49f8e1cb8b775e4f2f36e383d07
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
build: add configs, build scripts, cfbs files for supported boards
b2954d3 
Change-Id: I9ba1b3dc448cc447ab83d64f08d14406826fcede
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
blobs: update fizz/puff blobs
705b6b4 
Change-Id: I39a1c072b39fc270f030c306b35bbc615b1fc7cc
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
cfgs: Update puff enterprise cbox cfgs
9590c1e 
Change-Id: I88705ab0b3645f59794911ec61d7e6c642803505
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
blobs: update Mithrax ECRW
d876146 
Change-Id: I42cbd1dd433210b0ed82cff7a571581c5b7cb675
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
build.sh: add --ipxe build flag
080df13 
Change-Id: Ia7d362cc1045d02ce43bed56ba23faba41426da3
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
cfg: Add cfg for pujjoniru
0dd6144 
Change-Id: I507dfe63a4622b0a2d2544dedd3516964e4ff6e2
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
cfg: sarien add platform data
92e6c90 
Change-Id: I459ddcb3a03f4f96744eafb755ebb7593508b3c6
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
mb/google/brya/kinox: Enable NVMe on m.2 socket
e32ad95 
KINOX boards have an unpopulated m.2-2280 socket on the board which
can be used for NVMe, but it is non-functional due to GPIO GPP_B2
being set to NC, rather than the baseboard default for M2_SSD_PLA_L.

Drop the override for GPP_B2, so that it uses the baseboard default.

TEST=build/boot kinox with NVMe populated on M.2, verify NVMe drive
detected and bootable.

Change-Id: I8c64953217e8217fc21cd365016e2767d83c8c25
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
cfgs: Puff use upstream FSP, no iPXE
79d1ff4 
Change-Id: If00bd5d7e60355da0f33797e85096b24a56c86f0
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@MrChromebox
cfg: drop iPXE
85e5bcf 
Change-Id: I9a0ea93b0bd51a0c8c9ec463eb745862c7502730
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
@jackadam1981
mb/google/puff: hide laptop-class ACPI/PCI on Kaisa Chromebox
2a23822 
Hide laptop/tablet-class ACPI and storage on Acer Chromebox CXI4 (Kaisa)
when built as SYSTEM_TYPE_MINIPC.

Prior related PRs MrChromebox#36, MrChromebox#37, and MrChromebox#38 were closed. Those were AI-auto
submissions without hardware validation. This patch is submitted only
after manual flash testing and acceptance on real hardware.

Hardware scope: I only have one device (Kaisa / Acer Chromebox CXI4).
All testing below is on that single unit. Other Puff SKUs are unchanged
at compile time (BOARD_GOOGLE_KAISA* gates only).

Kconfig (defaults enable hide; config.kaisa.uefi unchanged):
- src/Kconfig: SYSTEM_HIDE_AC_ADAPTER / SYSTEM_HIDE_BATTERY (def_bool y
  if SYSTEM_TYPE_MINIPC)
- src/mainboard/google/puff/Kconfig: KAISA_HIDE_VBTN, KAISA_HIDE_R8168_ACPI,
  KAISA_HIDE_EMMC, KAISA_HIDE_SATA under BOARD_GOOGLE_KAISA*

EC ACPI (compile-time omit or _STA=0; EC Notify guarded):
- src/ec/google/chromeec/acpi/ac.asl: omit Device (AC) / ACPI0003
- src/ec/google/chromeec/acpi/battery.asl: omit BAT0/BAT1; guard Notify
- src/ec/google/chromeec/acpi/ec.asl: guard Notify(AC/BAT*) on _Qxx
- src/ec/google/chromeec/acpi/vbtn.asl: VBTN/VBTO _STA=0 when hide
- src/ec/google/chromeec/acpi/superio.asl: keyboard _STA=0 when hide

Drivers / SoC / devicetree:
- src/drivers/net/r8168.c: skip R8168 SSDT; PCI 10ec:8168 stays up
- src/soc/intel/cannonlake/fsp_params.c: SataEnable/ScsEmmcEnabled off
- src/soc/intel/cannonlake/acpi/scs.asl: eMMC _STA=0 when hide
- src/mainboard/google/puff/variants/kaisa/overridetree.cb: sata off

Tested on Kaisa only (single DUT): MrChromebox-2606 baseline vs this ROM
(linux_v0.2.0). kaisa-pr1-hide-accept: baseline fail=2 (R8168 ACPI,
8086:02d3 SATA, 8086:02c4 eMMC visible); with this patch fail=0.

Signed-off-by: Jack <jackadam1981@users.noreply.github.com>
@jackadam1981
mb/google/puff: add uefi-16MiB.fmd for iPXE builds
aa119e1 
Select uefi-16MiB.fmd when EDK2_ENABLE_IPXE is set so RW_LEGACY and
SMMSTORE fit the larger iPXE payload. Enable iPXE in config.kaisa.uefi.
EC/RTC/fan baseline and sleep profile are separate PRs.

Signed-off-by: Jack <jackadam1981@users.noreply.github.com>
@jackadam1981 jackadam1981 mentioned this pull request Jun 30, 2026
Open
4 tasks
@MrChromebox MrChromebox force-pushed the MrChromebox-2606 branch 5 times, most recently from 001d577 to ddfe385 Compare July 9, 2026 22:20
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@jackadam1981 @MrChromebox @movr4x @hitech95 @ellyq @coolstar