iCESugar FPGA Development Toolchain

General Information

This repository provides a toolchain for working with the iCESugar development board for the Lattice iCE40UP5k FPGA.

A Makefile to automate synthesis, flashing, and running testbenches is provided along with an example project.

Prerequisites

The following dependencies must be installed:

• Yosys

• Nextpnr

• icepack (icestorm)

• Icarus Verilog

• GTKWave

• TinyCC

• libusb-1.0

• hidapi-hidraw

You can either install them with your system package manager or use the provided Nix Flake.
Run make verify-dependencies to verify their installation.

Before you can flash the development board you will first have to install the required udev rules:

$ ./tools/install-udev-rules.sh

Usage

# Synthesis
$ make
# Synthesizes and generates the bitstream

# Run Testbenches
$ make test
# Runs all testbenches and generates VCD files
$ gtkwave bin/testbench.vcd

# Flash
$ make flash

Configuration

• VERBOSE: Set to 1 for detailed output

• TARGET: Bitstream file name

• TOP_MODULE: Top-level module name

• TOP_FILE: Top-level Verilog file