[linux-nvidia-6.18] arm64: Add workaround to convert MT_NORMAL_NC to Device-nGnRE #289
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…evice-nGnRE
Add CONFIG_ARM64_WORKAROUND_NC_TO_NGNRE configuration option that
enables conversion of MT_NORMAL_NC (Normal Non-Cacheable) memory
attribute to Device-nGnRE memory type in MAIR_EL1 for hardware that
requires stricter memory ordering or has issues with Non-Cacheable
memory mappings.
Key changes:
1. New memory type MT_NORMAL_NC_DMA (Attr5):
- Introduced specifically for DMA coherent memory mappings
- Configured with the same Normal Non-Cacheable attribute (0x44)
as MT_NORMAL_NC (Attr2) by default
- pgprot_dmacoherent uses MT_NORMAL_NC_DMA when workaround is
enabled, MT_NORMAL_NC otherwise
2. MAIR_EL1 conversion via alternatives framework:
- arch/arm64/mm/proc.S uses ARM64 alternatives to patch MAIR_EL1
during early boot
- Converts MT_NORMAL_NC (Attr2) from 0x44 to 0x04 (Device-nGnRE)
using efficient bfi instruction
- MT_NORMAL_NC_DMA (Attr5) keeps the same attribute value as
MT_NORMAL_NC originally had
- Zero performance overhead when workaround is disabled
3. Boot-time configuration:
- Enabled via kernel command line: mair_el1_nc_to_ngnre=1
- Boot CPU fixup in enable_nc_to_ngnre() applies conversion before
alternatives are patched
- Secondary CPUs automatically use patched alternatives in
__cpu_setup
- Runtime changes not supported as alternatives cannot be
re-patched after boot
4. Errata framework integration:
- Registered in arm64_errata[] array as ARM64_WORKAROUND_NC_TO_NGNRE
- Capability type: ARM64_CPUCAP_BOOT_CPU_FEATURE
- Uses cpucap_is_possible() for build-time capability checking
The workaround preserves pgprot_dmacoherent behavior while allowing
MT_NORMAL_NC to be converted to Device memory type for other mappings
that may be affected by hardware issues.
Signed-off-by: Shanker Donthineni <sdonthineni@nvidia.com>
Signed-off-by: Matthew R. Ochs <mochs@nvidia.com>
nirmoy
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Acked-by: Nirmoy Das <nirmoyd@nvidia.com>
clsotog
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Acked-by: Carol L Soto <csoto@nvidia.com>
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Add CONFIG_ARM64_WORKAROUND_NC_TO_NGNRE configuration option that
enables conversion of MT_NORMAL_NC (Normal Non-Cacheable) memory
attribute to Device-nGnRE memory type in MAIR_EL1 for hardware that
requires stricter memory ordering or has issues with Non-Cacheable
memory mappings.
Tested kernel parameter enabled and disabled: