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10 changes: 9 additions & 1 deletion sys/aarch64/aarch64.vadl
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@

// ARM AArch64 base instruction set

instruction set architecture AAarch64Base = {
instruction set architecture AArch64Base = {

constant SizeW = 32 // size of W registers is 32
constant SizeX = 64 // size of X registers is 64
Expand Down Expand Up @@ -634,4 +634,12 @@ instruction set architecture AAarch64Base = {
$LoadInstr (MemoryUnscaledInstr ; (LDUR ; "ldur" ; 0b111'000'000 ))
$StoreInstr (MemoryUnscaledInstr ; (STUR ; "stur" ; 0b111'000'000 ))

}

processor Virt implements AArch64Base = {

[ firmware ]
[ base : 0x0 ]
memory region [RAM] DRAM in MEM

}
13 changes: 13 additions & 0 deletions vadl-cli/main/vadl/cli/BaseCommand.java
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@

package vadl.cli;

import static org.apache.commons.lang3.exception.ExceptionUtils.getStackTrace;
import static picocli.CommandLine.ScopeType.INHERIT;

import com.google.errorprone.annotations.concurrent.LazyInit;
Expand Down Expand Up @@ -86,6 +87,12 @@ public abstract class BaseCommand implements Callable<Integer> {
description = "Expand all macros and write them to disk.")
boolean expandMacros;

@Option(names = "--with-stacktrace",
scope = INHERIT,
description = "Debug option to show the OpenVADL stacktrace of an emitted error."
)
boolean showStacktrace;

/**
* A list of timings. Will only be filled when the timings should be recorded.
*/
Expand Down Expand Up @@ -308,9 +315,15 @@ public Integer call() {

} catch (Diagnostic d) {
System.out.println(new DiagnosticPrinter().toString(d));
if (showStacktrace) {
System.out.println(getStackTrace(d));
}
returnVal = 1;
} catch (DiagnosticList d) {
System.out.println(new DiagnosticPrinter().toString(d));
if (showStacktrace) {
System.out.println(getStackTrace(d));
}
returnVal = 1;
} catch (RuntimeException | IOException | DuplicatedPassKeyException e) {
System.out.println("""
Expand Down
17 changes: 17 additions & 0 deletions vadl/main/vadl/cppCodeGen/CppTypeMap.java
Original file line number Diff line number Diff line change
Expand Up @@ -150,4 +150,21 @@

throw new RuntimeException("Types with more than 128 bits are not supported");
}

public static String nextFittingUInt(Type type) {
return nextFittingUInt(type.asDataType().bitWidth());
}

public static String nextFittingUInt(int size) {

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if (size <= 8) {
return "uint8_t";
} else if (size <= 16) {
return "uint16_t";
} else if (size <= 32) {
return "uint32_t";
} else if (size <= 64) {
return "uint64_t";
}
throw new RuntimeException("Types with more than 64 bits are not supported");
}
}
50 changes: 34 additions & 16 deletions vadl/main/vadl/iss/codegen/IssCMixins.java
Original file line number Diff line number Diff line change
Expand Up @@ -16,10 +16,13 @@

package vadl.iss.codegen;

import static vadl.error.DiagUtils.throwNotAllowed;

import vadl.cppCodeGen.context.CGenContext;
import vadl.iss.passes.nodes.IssConstExtractNode;
import vadl.iss.passes.nodes.IssValExtractNode;
import vadl.iss.passes.opDecomposition.nodes.IssMul2Node;
import vadl.iss.passes.opDecomposition.nodes.IssMulhNode;
import vadl.iss.passes.safeResourceRead.nodes.ExprSaveNode;
import vadl.iss.passes.tcgLowering.TcgExtend;
import vadl.javaannotations.Handler;
import vadl.viam.graph.Node;

Expand All @@ -30,30 +33,45 @@
*/
public interface IssCMixins {

/**
* Bundles all Invalid ISS node mixins.
*/
interface Invalid extends IssExpr {

}

/**
* Bundles all valid ISS node mixins.
*/
interface Default extends IssExtract {
interface Default extends IssExtract, IssExpr {
}

/**
* The invalid ISS Expr Node mixin.
*/
interface IssExpr {

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@Handler

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default void handle(CGenContext<Node> ctx, IssValExtractNode node) {
var valW = node.value().type().asDataType().bitWidth();
var ofsW = node.ofs().type().asDataType().bitWidth();
var lenW = node.len().type().asDataType().bitWidth();
// we perform a shift >> to clear the offset.
// then we extract the result using (s/u)extract.

var extract = node.extendMode() == TcgExtend.ZERO ? "VADL_uextract" : "VADL_sextract";

ctx.wr(extract + "( ");
// inner shift of value
ctx.wr("VADL_lsr(").gen(node.value())
.wr(", %s, ", valW).gen(node.value()).wr(", %s)", ofsW);

ctx.wr(", %s )", lenW);
}

@Handler
default void handle(CGenContext<Node> ctx,
vadl.iss.passes.opDecomposition.nodes.IssExprNode node) {
throwNotAllowed(node, "IssExprNode");
default void handle(CGenContext<Node> ctx, ExprSaveNode toHandle) {
throw new UnsupportedOperationException("Type ExprSaveNode not yet implemented");
}

@Handler
default void handle(CGenContext<Node> ctx, IssMulhNode toHandle) {
throw new UnsupportedOperationException("Type IssMulhNode not yet implemented");
}

@Handler
default void handle(CGenContext<Node> ctx, IssMul2Node toHandle) {
throw new UnsupportedOperationException("Type IssMul2Node not yet implemented");
}
}

/**
Expand Down
8 changes: 1 addition & 7 deletions vadl/main/vadl/iss/codegen/IssTranslateCodeGenerator.java
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,6 @@
import vadl.cppCodeGen.mixins.CInvalidMixins;
import vadl.iss.passes.nodes.IssStaticPcRegNode;
import vadl.iss.passes.nodes.TcgVRefNode;
import vadl.iss.passes.safeResourceRead.nodes.ExprSaveNode;
import vadl.iss.passes.tcgLowering.nodes.TcgNode;
import vadl.javaannotations.DispatchFor;
import vadl.javaannotations.Handler;
Expand All @@ -54,7 +53,7 @@ public class IssTranslateCodeGenerator implements
// default implementations
CDefaultMixins.All, IssCMixins.Default,
// invalid nodes
IssCMixins.Invalid, CInvalidMixins.SideEffect, CInvalidMixins.ResourceReads,
CInvalidMixins.SideEffect, CInvalidMixins.ResourceReads,
CInvalidMixins.InstrCall, CInvalidMixins.HardwareRelated {

private Instruction insn;
Expand Down Expand Up @@ -144,11 +143,6 @@ void impl(CGenContext<Node> ctx, FieldAccessRefNode node) {
ctx.wr(node.fieldAccess().simpleName());
}

@Handler
void handle(CGenContext<Node> ctx, ExprSaveNode toHandle) {
throw new UnsupportedOperationException("Type ExprSaveNode not yet implemented");
}

@Handler
void handle(CGenContext<Node> ctx, TcgVRefNode toHandle) {
ctx.wr(toHandle.cCode());
Expand Down
5 changes: 2 additions & 3 deletions vadl/main/vadl/iss/passes/IssBuiltInSimplificationPass.java
Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,8 @@

package vadl.iss.passes;

import static vadl.utils.GraphUtils.getInputNodes;
import static vadl.utils.GraphUtils.intU;
import static vadl.utils.GraphUtils.isOrhasDependencies;
import static vadl.utils.GraphUtils.sub;

import java.io.IOException;
Expand Down Expand Up @@ -100,8 +100,7 @@ public void handleLSR(BuiltInCall call) {
private void transformRightShiftToExtract(BuiltInCall call, TcgExtend extend) {
// Get the shift argument and ensure it is immediate.
var shiftArg = call.arguments().get(1);
boolean isImmediate = getInputNodes(shiftArg, e -> e instanceof ReadResourceNode)
.findAny().isEmpty();
boolean isImmediate = !isOrhasDependencies(shiftArg, e -> e instanceof ReadResourceNode);
if (!isImmediate) {
return;
}
Expand Down
13 changes: 13 additions & 0 deletions vadl/main/vadl/iss/passes/IssGdbInfoExtractionPass.java
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@
package vadl.iss.passes;

import static java.util.Objects.requireNonNull;
import static vadl.error.Diagnostic.warning;

import java.io.IOException;
import java.util.ArrayList;
Expand All @@ -27,6 +28,7 @@
import java.util.stream.Stream;
import javax.annotation.Nullable;
import vadl.configuration.IssConfiguration;
import vadl.error.DeferredDiagnosticStore;
import vadl.pass.PassName;
import vadl.pass.PassResults;
import vadl.template.Renderable;
Expand Down Expand Up @@ -94,6 +96,13 @@ public Result execute(PassResults passResults, Specification viam) throws IOExce
AtomicInteger i = new AtomicInteger();
var res = new ArrayList<Result.Reg>();
for (var reg : isa.registerTensors()) {
if (!isStandard(reg.resultType().bitWidth())) {
DeferredDiagnosticStore.add(warning("Failed GDB register support", reg)
.description("No GDB access could be generated for this register.")
.note("Currently only 8, 16, 32, 64 bit registers are supported.")
);
continue;
}
getRegTensor(reg, i.get(), pc).forEach(r -> {
res.add(r);
i.getAndIncrement();
Expand Down Expand Up @@ -140,5 +149,9 @@ private List<List<Integer>> regIndexes(List<Integer> dimensions) {
}
return res;
}

private static boolean isStandard(int width) {
return width == 8 || width == 16 || width == 32 || width == 64;
}
}

78 changes: 73 additions & 5 deletions vadl/main/vadl/iss/passes/IssNormalizationPass.java
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,8 @@

package vadl.iss.passes;

import static vadl.error.DiagUtils.throwNotAllowed;

import com.google.errorprone.annotations.FormatMethod;
import java.io.IOException;
import java.util.Collections;
Expand All @@ -36,7 +38,10 @@
import vadl.pass.PassName;
import vadl.pass.PassResults;
import vadl.types.BitsType;
import vadl.types.BuiltInTable;
import vadl.types.Type;
import vadl.utils.VadlBuiltInNoStatusDispatcher;
import vadl.viam.Constant;
import vadl.viam.Specification;
import vadl.viam.ViamError;
import vadl.viam.graph.Graph;
Expand Down Expand Up @@ -240,7 +245,7 @@

@Handler
void handle(TupleGetFieldNode toHandle) {
throw new UnsupportedOperationException("Type TupleGetFieldNode not yet implemented");
throwNotAllowed(toHandle, "Tuple GetFieldNode");
}

@Handler
Expand All @@ -263,7 +268,7 @@

@Handler
void handle(ReadArtificialResNode toHandle) {
throw new UnsupportedOperationException("Type ReadArtificialResNode not yet implemented");
// do nothing
}

@Handler
Expand Down Expand Up @@ -323,7 +328,7 @@

@Handler
void handle(SliceNode toHandle) {
throw new UnsupportedOperationException("Type SliceNode not yet implemented");
// do nothing
}


Expand Down Expand Up @@ -524,12 +529,70 @@

@Override
public void handleROL(BuiltInCall input) {
throw graphError(input, "Normalization not yet implemented for this built-in");
var opWidth = input.type().asDataType().bitWidth();
if (opWidth == targetSize) {
// if the operation is on target size, there is nothing to do
return;
}

// rotation operation where
// a = value
// b = shift amount
// N = size of value
// r = (b % N)
// (a << r) | (a >> (N - r))

var a = input.arguments().getFirst();
var b = input.arguments().get(1);
var N = Constant.Value.of(opWidth, Type.bits(32)).toNode();

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Local variable name 'N' must match pattern '^[a-z]([a-z0-9][a-zA-Z0-9]*)?$'.
// b % N
var r = BuiltInTable.UMOD.call(b, N);
// a << r
var aLsrR = BuiltInTable.LSL.call(a, r);

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Local variable name 'aLsrR' must match pattern '^[a-z]([a-z0-9][a-zA-Z0-9]*)?$'.
// N - r
var Nr = BuiltInTable.SUB.call(N, r);

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Local variable name 'Nr' must match pattern '^[a-z]([a-z0-9][a-zA-Z0-9]*)?$'.
// a >> Nr
var aNr = BuiltInTable.LSR.call(a, Nr);

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Local variable name 'aNr' must match pattern '^[a-z]([a-z0-9][a-zA-Z0-9]*)?$'.
// aLsrR | aNr
var result = BuiltInTable.OR.call(aLsrR, aNr);
// replace call
result = input.replaceAndDelete(result);
// truncate result to operation width, as a << r might cause an overflow
truncate(result, opWidth);
}

@Override
public void handleROR(BuiltInCall input) {
throw graphError(input, "Normalization not yet implemented for this built-in");
var opWidth = input.type().asDataType().bitWidth();
if (opWidth == targetSize) {
// if the operation is on target size, there is nothing to do
return;
}

// rotation operation where
// a = value
// b = shift amount
// N = size of value
// r = (b % N)
// (a >> r) | (a << (N - r))

var a = input.arguments().getFirst();
var b = input.arguments().get(1);
var N = Constant.Value.of(opWidth, Type.bits(32)).toNode();

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Local variable name 'N' must match pattern '^[a-z]([a-z0-9][a-zA-Z0-9]*)?$'.
// b % N
var r = BuiltInTable.UMOD.call(b, N);
// a >> r
var aLsrR = BuiltInTable.LSR.call(a, r);

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Local variable name 'aLsrR' must match pattern '^[a-z]([a-z0-9][a-zA-Z0-9]*)?$'.
// N - r
var Nr = BuiltInTable.SUB.call(N, r);

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Local variable name 'Nr' must match pattern '^[a-z]([a-z0-9][a-zA-Z0-9]*)?$'.
// a << Nr
var aNr = BuiltInTable.LSL.call(a, Nr);

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Local variable name 'aNr' must match pattern '^[a-z]([a-z0-9][a-zA-Z0-9]*)?$'.
// aLsrR | aNr
var result = BuiltInTable.OR.call(aLsrR, aNr);
// replace call
result = input.replaceAndDelete(result);
// truncate result to operation width, as a << (N - r) might cause an overflow
truncate(result, opWidth);
}

@Override
Expand Down Expand Up @@ -562,6 +625,11 @@
throw graphError(input, "Normalization not yet implemented for this built-in");
}

@Override
public void handleConcat(BuiltInCall input) {
// do nothing (result is already fine)
}


/* Nodes that should not exist at this point */

Expand Down
3 changes: 3 additions & 0 deletions vadl/main/vadl/iss/passes/IssTcgSchedulingPass.java
Original file line number Diff line number Diff line change
Expand Up @@ -329,6 +329,9 @@ private static void unscheduleConditions(Graph graph) {
* This will unschedule the condition of the if/select node, if it can be
* directly checked in the TCG brcond/movcond op.
* This optimizes unnecessary setconds and moves in the resulting TCG ops.
*
* <p>it is possible if the condition is not used as input by others than the scheduled node
* and write nodes that use it as condition only.</p>
*/
private static void unscheduleCondition(BuiltInCall cond) {
if (TcgPassUtils.conditionOf(cond.builtIn()) == null) {
Expand Down
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