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theonlytruealextheonlytruealex
committed
started key wrapping tests, moving to unwrapping
1 parent b5595fe commit a751f50

3 files changed

Lines changed: 80 additions & 24 deletions

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‎boards/nucleo_u545re_q/src/main.rs‎

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -273,21 +273,22 @@ unsafe fn start() -> (
273273
aes.set_client(aes_driver);
274274

275275
let aes_cbc_key = static_init!([u8; 32], [0; 32]);
276-
let aes_cbc_iv = static_init!([u8; 16], [0; 16]);
276+
// let aes_cbc_iv = static_init!([u8; 16], [0; 16]);
277277
let aes_cbc_src = static_init!([u8; 64], [0; 64]);
278278
let aes_cbc_dst = static_init!([u8; 96], [0; 96]);
279279
let aes_cbc_test = static_init!(
280-
capsules_extra::test::aes256::TestAES256Cbc<
280+
capsules_extra::test::aes256::TestAES256Ecb<
281281
'static,
282282
stm32u545::saes::Saes<'static, AES256>,
283283
>,
284-
capsules_extra::test::aes256::TestAES256Cbc::new(
284+
capsules_extra::test::aes256::TestAES256Ecb::new(
285285
saes,
286286
aes_cbc_key,
287-
aes_cbc_iv,
287+
// aes_cbc_iv,
288288
aes_cbc_src,
289289
aes_cbc_dst,
290-
true
290+
true,
291+
Some(0)
291292
)
292293
);
293294
saes.set_client(aes_cbc_test);

‎capsules/extra/src/test/aes256.rs‎

Lines changed: 53 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,7 @@ pub struct TestAES256Ecb<'a, A: 'a> {
5757
test_keywrap: Option<usize>,
5858
step: Cell<TestStep>,
5959
client: OptionalCell<&'static dyn CapsuleTestClient>,
60+
first_run: Cell<bool>,
6061
}
6162

6263
impl<'a, A: AES<'a, AES256> + AESECB> TestAES256Ecb<'a, A> {
@@ -77,30 +78,62 @@ impl<'a, A: AES<'a, AES256> + AESECB> TestAES256Ecb<'a, A> {
7778
test_keywrap,
7879
step: Cell::new(TestStep::StandardEnc),
7980
client: OptionalCell::empty(),
81+
first_run: Cell::new(true),
8082
}
8183
}
8284

83-
pub fn run(&self) {
85+
fn run_with_keywrap(&'static self, id: usize) {
86+
self.aes.enable();
87+
self.aes.set_mode_aesecb(true).unwrap();
88+
self.key.map(|key| key[..KEY.len()].copy_from_slice(&KEY));
89+
assert_eq!(self.aes.set_key(AESKey::Id(id)), Ok(()));
90+
self.aes.start_message();
91+
match self
92+
.aes
93+
.crypt(None, self.key.take().unwrap(), 0, AES256_KEY_SIZE)
94+
{
95+
None => {}
96+
Some((result, _, dest_back)) => {
97+
self.key.put(Some(dest_back));
98+
panic!("crypt() returned error: {:?}", result);
99+
}
100+
}
101+
debug!("sent key");
102+
}
103+
104+
pub fn run(&'static self) {
105+
if let Some(id) = self.test_keywrap {
106+
if self.first_run.get() {
107+
self.run_with_keywrap(id);
108+
return;
109+
}
110+
}
111+
84112
let step = self.step.get();
85113
let encrypting = is_encrypting(step);
86114
let in_place = is_in_place(step);
87115

88-
// Re-initialise hardware for every step except the second chunk, which
89-
// intentionally reuses the hardware state to verify key/IV retention.
90116
if !is_second_chunk(step) {
91117
self.aes.enable();
92118
self.aes.set_mode_aesecb(encrypting).unwrap();
93-
self.key.map(|key| {
94-
key[..KEY.len()].copy_from_slice(&KEY);
95-
assert_eq!(self.aes.set_key(AESKey::PlainText(key)), Ok(()));
96-
});
119+
if let Some(id) = self.test_keywrap {
120+
assert_eq!(
121+
self.aes
122+
.set_key(AESKey::Wrapped(self.key.take().unwrap(), id)),
123+
Ok(())
124+
);
125+
} else {
126+
self.key.map(|key| {
127+
key[..KEY.len()].copy_from_slice(&KEY);
128+
assert_eq!(self.aes.set_key(AESKey::PlainText(key)), Ok(()));
129+
});
130+
}
97131
let src = if encrypting { &PTXT } else { &CTXT_ECB };
98132
self.source.map(|s| s[..src.len()].copy_from_slice(src));
99133
self.aes.start_message();
100134
}
101135

102136
prepare_in_place(step, in_place, &self.source, &self.data);
103-
104137
let (start, stop) = chunk_range(step);
105138
run_crypt(self.aes, in_place, &self.source, &self.data, start, stop);
106139
}
@@ -112,10 +145,19 @@ impl<'a, A: AES<'a, AES256> + AESECB> CapsuleTest for TestAES256Ecb<'a, A> {
112145
}
113146
}
114147

115-
impl<'a, A: AES<'a, AES256> + AESECB> hil::symmetric_encryption::Client<'a>
116-
for TestAES256Ecb<'a, A>
148+
impl<A: AES<'static, AES256> + AESECB> hil::symmetric_encryption::Client<'static>
149+
for TestAES256Ecb<'static, A>
117150
{
118-
fn crypt_done(&'a self, source: Option<&'static mut [u8]>, dest: &'static mut [u8]) {
151+
fn crypt_done(&'static self, source: Option<&'static mut [u8]>, dest: &'static mut [u8]) {
152+
if self.first_run.get() {
153+
self.first_run.set(false);
154+
if self.test_keywrap.is_some() {
155+
self.key.replace(dest);
156+
debug!("key");
157+
self.run();
158+
return;
159+
}
160+
}
119161
let step = self.step.get();
120162
let encrypting = is_encrypting(step);
121163
let in_place = is_in_place(step);

‎chips/stm32u5xx/src/saes.rs‎

Lines changed: 21 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -370,6 +370,7 @@ impl<'a, K: AESKeySize> Saes<'a, K> {
370370
}
371371

372372
fn start_key_wrapping(&self, ctx: CryptoContext, key_id: KeyID) {
373+
debug!("start wrap");
373374
let regs = self.registers;
374375

375376
match K::LENGTH {
@@ -384,9 +385,13 @@ impl<'a, K: AESKeySize> Saes<'a, K> {
384385

385386
regs.cr.modify(CR::KMOD::WRAPPED);
386387
regs.cr.modify(key_id.to_bits());
388+
// POLLING FOR KEY TO BE LOADED
389+
while !regs.sr.is_set(SR::KEYVALID) {}
387390
regs.cr.modify(CR::EN::SET);
388391

389392
self.write_input(ctx);
393+
debug!("CR: {:02x?}", regs.cr.get());
394+
debug!("SR: {:02x?}", regs.sr.get());
390395
self.state.set(State::Crypt(ctx));
391396
}
392397

@@ -443,6 +448,7 @@ impl<'a, K: AESKeySize> Saes<'a, K> {
443448
}
444449

445450
pub fn handle_interrupt(&self) {
451+
debug!("interrupt");
446452
if self.registers.isr.is_set(ISR::CCF) {
447453
self.registers.icr.write(ICR::CCF::SET);
448454
self.computation_complete();
@@ -486,8 +492,9 @@ impl<'a, K: AESKeySize> kernel::hil::symmetric_encryption::AES<'a, K> for Saes<'
486492
}
487493

488494
fn set_key(&self, key: AESKey) -> Result<(), ErrorCode> {
489-
if self.registers.cr.any_matching_bits_set(CR::EN::SET)
490-
|| self.registers.sr.any_matching_bits_set(SR::BUSY::SET)
495+
let regs = self.registers;
496+
if regs.cr.any_matching_bits_set(CR::EN::SET)
497+
|| regs.sr.any_matching_bits_set(SR::BUSY::SET)
491498
{
492499
return Err(ErrorCode::BUSY);
493500
}
@@ -504,22 +511,25 @@ impl<'a, K: AESKeySize> kernel::hil::symmetric_encryption::AES<'a, K> for Saes<'
504511
}
505512
return Ok(());
506513
}
507-
_ => return Err(ErrorCode::INVAL),
514+
AESKey::Wrapped(key, id) => {
515+
regs.cr.modify(CR::MODE::Decrypt);
516+
key
517+
}
508518
};
509519

510520
if key.len() != K::LENGTH {
511521
return Err(ErrorCode::INVAL);
512522
}
513523

514524
if K::LENGTH == AES128_KEY_SIZE {
515-
self.registers.cr.modify(CR::KEYSIZE::AES128);
525+
regs.cr.modify(CR::KEYSIZE::AES128);
516526
} else {
517-
self.registers.cr.modify(CR::KEYSIZE::AES256);
527+
regs.cr.modify(CR::KEYSIZE::AES256);
518528
}
519529

520-
self.registers.cr.modify(CR::KEYSEL::SOFTWARE);
521-
self.registers.cr.modify(CR::KEYPROT::ALLOW_TRASNFER);
522-
self.registers.cr.modify(CR::KMOD::NORMAL);
530+
regs.cr.modify(CR::KEYSEL::SOFTWARE);
531+
regs.cr.modify(CR::KEYPROT::ALLOW_TRASNFER);
532+
regs.cr.modify(CR::KMOD::NORMAL);
523533

524534
if !self.encrypting.get() {
525535
self.prepare_decryption_key(key);
@@ -568,6 +578,9 @@ impl<'a, K: AESKeySize> kernel::hil::symmetric_encryption::AES<'a, K> for Saes<'
568578
)> {
569579
let state = self.state.get();
570580

581+
debug!("CR: {:02x?}", self.registers.cr.get());
582+
debug!("SR: {:02x?}", self.registers.sr.get());
583+
571584
// Hardware busy check
572585
if self.output.is_some() || self.registers.sr.any_matching_bits_set(SR::BUSY::SET) {
573586
return Some((Err(ErrorCode::BUSY), source, dest));

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