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修复 compat pinned tensor 的 inplace fill 语义 #78666
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SigureMo
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149 changes: 149 additions & 0 deletions
149
paddle/phi/api/include/compat/utils/mapped_pinned_tensor.h
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,149 @@ | ||
| // Copyright (c) 2026 PaddlePaddle Authors. All Rights Reserved. | ||
| // | ||
| // Licensed under the Apache License, Version 2.0 (the "License"); | ||
| // you may not use this file except in compliance with the License. | ||
| // You may obtain a copy of the License at | ||
| // | ||
| // http://www.apache.org/licenses/LICENSE-2.0 | ||
| // | ||
| // Unless required by applicable law or agreed to in writing, software | ||
| // distributed under the License is distributed on an "AS IS" BASIS, | ||
| // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| // See the License for the specific language governing permissions and | ||
| // limitations under the License. | ||
|
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| #pragma once | ||
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| #include <cstddef> | ||
| #include <cstring> | ||
| #include <memory> | ||
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| #include "paddle/common/ddim.h" | ||
| #include "paddle/phi/api/include/api.h" | ||
| #include "paddle/phi/api/include/tensor.h" | ||
| #include "paddle/phi/common/int_array.h" | ||
| #include "paddle/phi/common/place.h" | ||
| #include "paddle/phi/core/allocator.h" | ||
| #include "paddle/phi/core/dense_tensor.h" | ||
| #include "paddle/phi/core/enforce.h" | ||
| #include "paddle/phi/core/tensor_meta.h" | ||
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| #ifdef PADDLE_WITH_HIP | ||
| #include <hip/hip_runtime.h> | ||
| #elif defined(PADDLE_WITH_CUDA) | ||
| #include <cuda_runtime_api.h> | ||
| #endif | ||
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| namespace compat { | ||
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| inline void _PD_FreeMappedPinnedAllocation(phi::Allocation* allocation) { | ||
| if (allocation == nullptr || allocation->ptr() == nullptr) { | ||
| return; | ||
| } | ||
| #ifdef PADDLE_WITH_HIP | ||
| PADDLE_ENFORCE_GPU_SUCCESS(hipHostFree(allocation->ptr())); | ||
| #elif defined(PADDLE_WITH_CUDA) | ||
| PADDLE_ENFORCE_GPU_SUCCESS(cudaFreeHost(allocation->ptr())); | ||
| #endif | ||
| } | ||
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| inline std::shared_ptr<phi::Allocation> _PD_CreateMappedPinnedAllocation( | ||
| size_t bytes, const phi::Place& pinned_place) { | ||
| if (bytes == 0) { | ||
| return std::make_shared<phi::Allocation>(nullptr, 0, pinned_place); | ||
| } | ||
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| void* ptr = nullptr; | ||
| #ifdef PADDLE_WITH_HIP | ||
| constexpr unsigned int kMappedPinnedFlags = | ||
| hipHostMallocPortable | hipHostMallocMapped; | ||
| PADDLE_ENFORCE_GPU_SUCCESS(hipHostMalloc(&ptr, bytes, kMappedPinnedFlags)); | ||
| #elif defined(PADDLE_WITH_CUDA) | ||
| constexpr unsigned int kMappedPinnedFlags = | ||
| cudaHostAllocPortable | cudaHostAllocMapped; | ||
| PADDLE_ENFORCE_GPU_SUCCESS(cudaHostAlloc(&ptr, bytes, kMappedPinnedFlags)); | ||
| #else | ||
| PD_THROW("Mapped GPU pinned memory requires CUDA or HIP support."); | ||
| #endif | ||
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| return std::make_shared<phi::Allocation>( | ||
| ptr, bytes, &_PD_FreeMappedPinnedAllocation, pinned_place); | ||
| } | ||
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| inline paddle::Tensor _PD_EmptyPinnedTensor(const paddle::IntArray& shape, | ||
| phi::DataType dtype, | ||
| const phi::Place& pinned_place) { | ||
| #if defined(PADDLE_WITH_CUDA) || defined(PADDLE_WITH_HIP) | ||
| if (phi::is_cuda_pinned_place(pinned_place)) { | ||
| auto dims = common::make_ddim(shape.GetData()); | ||
| auto meta = phi::DenseTensorMeta(dtype, dims); | ||
| auto bytes = | ||
| static_cast<size_t>(common::product(dims)) * phi::SizeOf(dtype); | ||
| auto holder = _PD_CreateMappedPinnedAllocation(bytes, pinned_place); | ||
| return paddle::Tensor(std::make_shared<phi::DenseTensor>(holder, meta)); | ||
| } | ||
| #endif | ||
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| auto dense = paddle::experimental::empty(shape, dtype, phi::CPUPlace()); | ||
| return dense.copy_to(pinned_place, /*blocking=*/true); | ||
| } | ||
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| inline paddle::Tensor _PD_CopyTensorToPinnedPlace( | ||
| const paddle::Tensor& src, const phi::Place& pinned_place) { | ||
| #if defined(PADDLE_WITH_CUDA) || defined(PADDLE_WITH_HIP) | ||
| if (phi::is_cuda_pinned_place(pinned_place)) { | ||
| auto src_dense = std::dynamic_pointer_cast<phi::DenseTensor>(src.impl()); | ||
| if (src_dense && src_dense->meta().is_contiguous() && | ||
| src_dense->meta().offset == 0) { | ||
| auto bytes = src_dense->memory_size(); | ||
| auto holder = _PD_CreateMappedPinnedAllocation(bytes, pinned_place); | ||
| if (bytes > 0) { | ||
| std::memcpy(holder->ptr(), src_dense->data(), bytes); | ||
| } | ||
| return paddle::Tensor( | ||
| std::make_shared<phi::DenseTensor>(holder, src_dense->meta())); | ||
| } | ||
| } | ||
| #endif | ||
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| return src.copy_to(pinned_place, /*blocking=*/true); | ||
| } | ||
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| inline void* _PD_GetKernelVisibleDataPtr(const paddle::Tensor& tensor) { | ||
| if (!tensor.defined()) { | ||
| return nullptr; | ||
| } | ||
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| #if defined(PADDLE_WITH_CUDA) || defined(PADDLE_WITH_HIP) | ||
| if (phi::is_cuda_pinned_place(tensor.place())) { | ||
| auto dense = std::dynamic_pointer_cast<phi::DenseTensor>(tensor.impl()); | ||
| if (!dense) { | ||
| return const_cast<void*>(tensor.data()); | ||
| } | ||
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| auto holder = dense->Holder(); | ||
| if (!holder || holder->ptr() == nullptr) { | ||
| return const_cast<void*>(tensor.data()); | ||
| } | ||
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| void* mapped_base = nullptr; | ||
| #ifdef PADDLE_WITH_HIP | ||
| auto err = hipHostGetDevicePointer(&mapped_base, holder->ptr(), 0); | ||
| if (err == hipSuccess && mapped_base != nullptr) { | ||
| return static_cast<char*>(mapped_base) + dense->meta().offset; | ||
| } | ||
| (void)hipGetLastError(); | ||
| #elif defined(PADDLE_WITH_CUDA) | ||
| auto err = cudaHostGetDevicePointer(&mapped_base, holder->ptr(), 0); | ||
| if (err == cudaSuccess && mapped_base != nullptr) { | ||
| return static_cast<char*>(mapped_base) + dense->meta().offset; | ||
| } | ||
| (void)cudaGetLastError(); | ||
| #endif | ||
| } | ||
| #endif | ||
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| return const_cast<void*>(tensor.data()); | ||
| } | ||
|
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| } // namespace compat | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,48 @@ | ||
| // Copyright (c) 2026 PaddlePaddle Authors. All Rights Reserved. | ||
| // | ||
| // Licensed under the Apache License, Version 2.0 (the "License"); | ||
| // you may not use this file except in compliance with the License. | ||
| // You may obtain a copy of the License at | ||
| // | ||
| // http://www.apache.org/licenses/LICENSE-2.0 | ||
| // | ||
| // Unless required by applicable law or agreed to in writing, software | ||
| // distributed under the License is distributed on an "AS IS" BASIS, | ||
| // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| // See the License for the specific language governing permissions and | ||
| // limitations under the License. | ||
|
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| #if defined(PADDLE_WITH_CUDA) | ||
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| #include <ATen/ops/empty.h> | ||
| #include <c10/cuda/CUDAStream.h> | ||
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| #include "gtest/gtest.h" | ||
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| namespace { | ||
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| __global__ void WriteScalarKernel(int* dst, int value) { | ||
| if (blockIdx.x == 0 && threadIdx.x == 0) { | ||
| dst[0] = value; | ||
| } | ||
| } | ||
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| } // namespace | ||
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| TEST(ATenPinMemoryKernelTest, KernelCanWritePinnedTensorDirectly) { | ||
| auto stream = at::cuda::getCurrentCUDAStream(); | ||
| auto tensor = | ||
| at::empty({1}, at::TensorOptions().dtype(at::kInt).pinned_memory(true)); | ||
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| ASSERT_TRUE(tensor.is_pinned()); | ||
| ASSERT_FALSE(tensor.is_cuda()); | ||
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| tensor._PD_GetInner().data<int>()[0] = 0; | ||
| WriteScalarKernel<<<1, 1, 0, stream>>>(tensor.data_ptr<int>(), 123); | ||
| ASSERT_EQ(cudaGetLastError(), cudaSuccess); | ||
| ASSERT_EQ(cudaStreamSynchronize(stream), cudaSuccess); | ||
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| EXPECT_EQ(tensor._PD_GetInner().data<int>()[0], 123); | ||
| } | ||
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| #endif // PADDLE_WITH_CUDA |
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_PD_GetKernelVisibleDataPtr() falls back to returning tensor.data() when cudaHostGetDevicePointer/hipHostGetDevicePointer fails. Since the default GPUPinned allocator uses cudaHostAllocPortable (no Mapped flag) (see paddle/phi/core/memory/allocation/pinned_allocator.cc:40-46), this failure path will be hit for pinned tensors created outside the new mapped allocation helpers, and data_ptr() will again return a non-device-visible host address (contradicting the new “pointer kernels should use” contract). Consider either (a) ensuring all compat pinned-tensor creation/copy paths use _PD_CreateMappedPinnedAllocation (or another mapped/registered strategy), or (b) making this function throw/explicitly error when it cannot obtain a device-visible alias for a CUDA-pinned tensor, to avoid silently returning an unsafe pointer for kernels.