RAPcores

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1. rapcores rapcores Public

   Robotic Application Processor

   Verilog 26 6

2. caravel_rapcores caravel_rapcores Public

   rapcore ASIC prototype on the openmpw/caravel shuttle

   Verilog 2

3. spi-flash-programmer spi-flash-programmer Public

   Forked from tonokip/spi-flash-programmer

   C++

4. JupyterNotebooks JupyterNotebooks Public

   Jupyter Notebooks for analysis

   Jupyter Notebook

5. caravel caravel Public

   Forked from efabless/caravel_mpw-one

   Verilog

6. openlane openlane Public

   Forked from The-OpenROAD-Project/OpenLane

   OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.

   Verilog