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[FlyToROCDL] Bump LLVM to 941a04e6 and adapt gpu.launch_func lowering - #1051

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[FlyToROCDL] Bump LLVM to 941a04e6 and adapt gpu.launch_func lowering#1051
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@Phil-amd Phil-amd commented Aug 21, 2026

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Summary

Bump the upstream LLVM pin from e2a39f504fee (2026-07-23) to 941a04e69ee8
(2026-08-09), and adapt FlyToROCDL to the one upstream API change that broke
the build.

Motivation

Picks up ~2.5 weeks of upstream LLVM, including
llvm/llvm-project#214885 "[AMDGPU] Keep TDM counter low",
which makes the hazard recognizer insert s_wait_tensorcnt 10 before a TDM op
that would otherwise follow another one with no intervening drain
(gfx1250/gfx1251, new needs-tdm-drain subtarget feature).

Changes

  • thirdparty/llvm-build-info.json: upstream.llvm_hash941a04e69ee8.

  • lib/Conversion/FlyToROCDL/FlyToROCDL.cpp: upstream merged the two
    gpu::LaunchFuncOp builders taking a SymbolRefAttr kernel into one,
    inserting Value asyncObject between asyncDependencies and clusterSize.
    LaunchFuncOpLowering chose between the two old signatures, so neither call
    matched any more. Both branches collapse into a single call against the merged
    builder. This was the only translation unit that failed to build.

    Side effect: the old asyncObject builder never pushed an AsyncTokenType
    onto the result types, so an op carrying both an asyncObject and an async
    token lost the token. The merged builder now gets the token type in both
    cases. The guard rejecting asyncObject + asyncDependencies is unchanged.

Breaking Changes

None for FlyDSL users. Consumers building their own LLVM must move to
941a04e69ee8: FlyToROCDL.cpp will not compile against the old pin, where the
merged gpu::LaunchFuncOp builder does not exist.

@Phil-amd
Phil-amd force-pushed the phil/bump-llvm-941a04e6 branch 2 times, most recently from 04e3147 to b6eadae Compare August 21, 2026 06:27
@sjfeng1999
sjfeng1999 requested a review from coderfeli August 21, 2026 06:37
@Phil-amd Phil-amd self-assigned this Aug 24, 2026
@Phil-amd
Phil-amd requested a review from jli-melchior August 24, 2026 01:01
@Phil-amd Phil-amd changed the title [Misc][FlyToROCDL] Bump LLVM to 941a04e6 and adapt gpu.launch_func lowering [FlyToROCDL] Bump LLVM to 941a04e6 and adapt gpu.launch_func lowering Aug 24, 2026
@Phil-amd

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@jli-melchior
Kindly review when you get a chance.

@jli-melchior

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LGTM

@Phil-amd
Phil-amd force-pushed the phil/bump-llvm-941a04e6 branch 2 times, most recently from b6eadae to 33d9959 Compare August 26, 2026 09:47
Phil-amd added a commit that referenced this pull request Aug 27, 2026
prepare-mlir builds one shared MLIR install from the PR's pin and uses it
for both wheels. An LLVM pin bump also carries the source adaptation that
the new pin requires, so the base commit cannot compile against it and the
baseline wheel is never produced. The run ends at "No usable main benchmark
baseline found" (run 32954898547, PR #1051), losing the vs-main comparison
for exactly the PRs whose performance impact is least predictable.

When the LLVM inputs differ from the base commit's, restore the MLIR install
belonging to the base pin and build the baseline wheel against that.

- ci_mlir_cache_key.sh derives the cache key from file contents, making it
  computable for the base commit. It replaces hashFiles() and serves both
  call sites, so the two keys cannot drift.
- The baseline entry is restored before the shared one and under the same
  path. actions/cache derives its version from the path list, so a renamed
  restore would miss whatever the key said.
- The unpacked install is checked against its VCSRevision.h. A wrong-pin
  baseline is worse than none: it yields a plausible number nobody queries.
- prepare-mlir marks the wheel with the LLVM it was really built against,
  and the table is labelled from that marker. Deriving it from the pinned
  hashes would mislabel a bump that needed no source adaptation.

A cache miss means no baseline. The wanted entry is the one every non-bump
PR restores on every run, so a miss is the exception.

Changing the key formula invalidates the cache, so every PR cold-builds LLVM
until main's next push saves an entry under the new one.
coderfeli pushed a commit that referenced this pull request Aug 27, 2026
#1071)

prepare-mlir builds one shared MLIR install from the PR's pin and uses it
for both wheels. An LLVM pin bump also carries the source adaptation that
the new pin requires, so the base commit cannot compile against it and the
baseline wheel is never produced. The run ends at "No usable main benchmark
baseline found" (run 32954898547, PR #1051), losing the vs-main comparison
for exactly the PRs whose performance impact is least predictable.

When the LLVM inputs differ from the base commit's, restore the MLIR install
belonging to the base pin and build the baseline wheel against that.

- ci_mlir_cache_key.sh derives the cache key from file contents, making it
  computable for the base commit. It replaces hashFiles() and serves both
  call sites, so the two keys cannot drift.
- The baseline entry is restored before the shared one and under the same
  path. actions/cache derives its version from the path list, so a renamed
  restore would miss whatever the key said.
- The unpacked install is checked against its VCSRevision.h. A wrong-pin
  baseline is worse than none: it yields a plausible number nobody queries.
- prepare-mlir marks the wheel with the LLVM it was really built against,
  and the table is labelled from that marker. Deriving it from the pinned
  hashes would mislabel a bump that needed no source adaptation.

A cache miss means no baseline. The wanted entry is the one every non-bump
PR restores on every run, so a miss is the exception.

Changing the key formula invalidates the cache, so every PR cold-builds LLVM
until main's next push saves an entry under the new one.
…wering

Move the upstream LLVM pin from e2a39f504fee to 941a04e69ee8.

Upstream merged the two gpu::LaunchFuncOp builders taking a SymbolRefAttr
kernel into one, inserting `Value asyncObject` before `clusterSize`.
LaunchFuncOpLowering chose between the two old signatures, so neither call
matched any more; FlyToROCDL.cpp was the only translation unit that failed to
build. Collapse both branches into one call against the merged builder.

This also stops an op carrying both an asyncObject and an async token from
losing the token: the old asyncObject builder never pushed an AsyncTokenType
onto the result types.

Signed-off-by: Phil Li <haicli@amd.com>
@Phil-amd
Phil-amd force-pushed the phil/bump-llvm-941a04e6 branch from 3f40950 to 0afb7f8 Compare August 27, 2026 21:19
coderfeli pushed a commit that referenced this pull request Aug 31, 2026
The baseline install is ~1.4 GB and these runners sit in different
regions, so the transfer is slow enough to be interrupted mid-flight:

    Received 1010827264 of 1396566653 (72.4%), 1.6 MBs/sec
    ##[warning]Failed to restore: Server failed to authenticate the
              request ... Authorization header ... signature.
    Cache not found for input keys: mlir-install-...-4087a417...

The entry existed and matched - 1396566653 bytes is its exact size - but
the blob SAS auth failed partway through, and actions/cache reports that
as a plain miss. The run then built the baseline wheel against the PR's
own MLIR, where it cannot compile, and lost the vs-main comparison to
what was really a network fault. Seen on PR #1051, run 33117631657; the
same signature is on record for these runners from an earlier
investigation.

Retry the restore once. It costs nothing when the first attempt works,
and both attempts carry a timeout so a hung transfer cannot eat the job
budget instead.
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2 participants