Radix-2 Fast Fourier Transform for FPGA

Coded in Verilog

Name		Name	Last commit message	Last commit date
.gitignore		.gitignore
D_latch.v		D_latch.v
README.md		README.md
T_flipflop.v		T_flipflop.v
address_gen_unit.v		address_gen_unit.v
butterfly_unit.v		butterfly_unit.v
clock_delay.v		clock_delay.v
counter_3bm5.v		counter_3bm5.v
counter_4b.v		counter_4b.v
counter_5b.v		counter_5b.v
fft.v		fft.v
incrementer.v		incrementer.v
input_mem_initialization.coe		input_mem_initialization.coe
main.ucf		main.ucf
main.v		main.v
mem_check.v		mem_check.v
memory_2_bank.v		memory_2_bank.v
result_check_mem_initializtion.coe		result_check_mem_initializtion.coe
right_shift.v		right_shift.v
rotate_left_5b.v		rotate_left_5b.v
sync_SR_latch.v		sync_SR_latch.v
twiddle_factor_ROM.v		twiddle_factor_ROM.v
twiddle_factor_ROM_initialization.coe		twiddle_factor_ROM_initialization.coe

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