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Pull requests: VUnit/vunit

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Pull requests list

Added VUnit menu in Questa/Modelsim GUI.
#1194 opened Apr 10, 2026 by LarsAsplund Collaborator Loading…
Skip compilation when no tests match filter
#1191 opened Apr 1, 2026 by robindust-ce Loading…
1
add parity to uart verification component
#1181 opened Mar 15, 2026 by rafaelnp Contributor Loading…
18
change _create_modelsim_ini() and add ini_flag="ini" for questsim>=ve…
#1134 opened Oct 4, 2025 by asicnet Loading…
2
Add support for non-byte tdata widths in AXI stream VCs.
#1128 opened Aug 4, 2025 by LarsAsplund Collaborator Loading…
CI: Do not run scheduled jobs on forks
#1117 opened May 29, 2025 by oscargus Contributor Loading…
CI: Use hashes for GitHub Action versions
#1116 opened May 29, 2025 by oscargus Contributor Loading…
Remove redundant directory from Riviera-PRO dataset path Enhancement Tool: RivieraPro
#995 opened Mar 6, 2024 by por3bski Loading… v5.0.0
2
Fix regex for VHDL component instantiations
#990 opened Feb 29, 2024 by javValverde Loading… v5.0.0
2
VHDL-embedded Python code
#986 opened Jan 16, 2024 by LarsAsplund Collaborator • Draft
17
proposal for vhdl_parser to fix the issue #808 Enhancement Parsing
#839 opened Jun 1, 2022 by asicnet Loading… v5.1.0
2
Improving regexs that scan attributes Enhancement
#836 opened May 31, 2022 by std-max Contributor Loading… v5.1.0
1
5
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