Extended multiply horizontal add instruction

proposals/simd/BinarySIMD.md

@@ -222,3 +222,4 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
 | `i32x4.trunc_sat_f32x4_u`  |    `0xf9`| -                  |
 | `f32x4.convert_i32x4_s`    |    `0xfa`| -                  |
 | `f32x4.convert_i32x4_u`    |    `0xfb`| -                  |
+| `i16x8.dot_i8x16_u`        |          | -                  |

proposals/simd/ImplementationStatus.md

@@ -190,6 +190,7 @@
 | `i32x4.trunc_sat_f32x4_u`  |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `f32x4.convert_i32x4_s`    |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `f32x4.convert_i32x4_u`    |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
+| `i16x8.dot_i8x16_u`        |                           |                    |                    |                    |                    |
 
 [1] Tip of tree LLVM as of May 20, 2020
 

proposals/simd/SIMD.md

@@ -1023,3 +1023,18 @@ def S.widen_low_T_u(a):
 def S.widen_high_T_u(a):
     return S.widen_high_T(Zext, a)
 ```
+
+
+### Horizontal Multiply Extend and Add
+* `i16x8.dot_i8x16_u(a: v128, b: v128) -> v128`
+
+Multiplies two u8x16 vectors, temporarily expands the values to two i16x8s, before performing 
+pairwise addition leading to one i16x8/u16x8.
+
+```python
+def S.extmul_padd_i8x16_u(a, b):
+    result = S.New()
+    for i in S.range(S.Lanes/2):
+        result[i] = (a[i]*b[i])+(a[i+1]*b[i+1])
+    return result
+```