Skip to content

Add test case for fixes to getCorrespondingTile when called on certain SLL tiles#1360

Merged
clavin-xlnx merged 4 commits into
Xilinx:2025.2.2from
abutt-amd:sll-relocation-fix
Apr 29, 2026
Merged

Add test case for fixes to getCorrespondingTile when called on certain SLL tiles#1360
clavin-xlnx merged 4 commits into
Xilinx:2025.2.2from
abutt-amd:sll-relocation-fix

Conversation

@abutt-amd

Copy link
Copy Markdown
Contributor

Some Versal devices contain both SLL and SLL_1 tile name roots, even though both name roots have the same tile type (SLL). These different tile name roots have overlapping coordinates, so there can be an SLL tile and an SLL_1 tile with the same X, Y coordinates. This is a test for a change to the rapidwright-api that allows SLL tiles to be relocated to SLL_1 tiles and vice versa, creating more opportunities for module relocation.

clavin-xlnx and others added 2 commits April 6, 2026 10:20
Signed-off-by: Chris Lavin <chris.lavin@amd.com>
…n SLL tiles

Signed-off-by: Andrew Butt <Andrew.Butt@amd.com>
Comment thread test/src/com/xilinx/rapidwright/design/TestModule.java Outdated
Signed-off-by: Andrew Butt <Andrew.Butt@amd.com>
@abutt-amd abutt-amd requested a review from clavin-xlnx April 6, 2026 21:56
@clavin-xlnx clavin-xlnx changed the base branch from master to 2025.2.2 April 8, 2026 16:45
@clavin-xlnx clavin-xlnx merged commit 20dc53e into Xilinx:2025.2.2 Apr 29, 2026
8 checks passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants