Introduce Phase Architecture for FINN Builder Pipeline

[auphelia]

Overview

Groups fine-grained build steps into 6 logical phases for simpler, more maintainable build scripts while maintaining full backward compatibility.

Phase Structure

1. phase_prepare_model [step_qonnx_to_finn, step_tidy_up]
2. phase_optimize_model [step_streamline]
3. phase_convert_to_hardware [step_convert_to_hw, step_create_dataflow_partition, step_specialize_layers, step_loop_rolling]
4. phase_optimize_hardware [step_target_fps_parallelization, step_apply_folding_config, step_minimize_bit_width, step_transpose_decomposition, step_generate_estimate_reports]
5. phase_build_hardware [step_hw_codegen, step_hw_ipgen, step_set_fifo_depths]
6. phase_synthesize_hardware [step_create_stitched_ip, step_measure_rtlsim_performance, step_synthesize_bitfile, step_make_driver, step_deployment_package]

Tasks

• Create build_dataflow_phases.py with 6 phases grouping related steps
• Update build_dataflow.py to support both phases and fine-grained steps
• Add inject_steps_before/after for custom step injection
• Phases save intermediate models for each internal step (backward compatible checkpoints)
• Update all tests to use phases or work with phase-based defaults
• Update example configs in qnn-data/build_dataflow/
• More extensive testing across different models and configurations
• Add dataflow layer validation check after phase_convert_to_hardware - verify all layers are fpgadataflow layers OR form cohesive dataflow block in middle. Raise assertion listing unconverted layers if validation fails.
• Discuss analytical FIFO flow integration - ensure compatibility with upcoming analytical FIFO sizing
• Documentation