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[AIE] Make getConstantMovOpcode return std::optional to handle failure gracefully
Change getConstantMovOpcode() from returning unsigned to returning std::optional<unsigned> to allow callers to handle cases where no suitable opcode exists for a given register class/immediate combination. Previously, getConstantMovOpcode() would hit llvm_unreachable() when it couldn't find a matching opcode (e.g., immediate > 32 bits, or unsupported register class). This was problematic for foldImmediate(), which had no way to bail out before hitting the unreachable. Now foldImmediate() checks the optional and returns false when no opcode is available, allowing the fold to be skipped gracefully. Instruction selector call sites use assertions since they expect opcodes to always be available during selection. This addresses a review comment requesting that foldImmediate() detect potential failures early instead of hitting unreachable paths.
1 parent e9815c3 commit 2506196

10 files changed

Lines changed: 46 additions & 42 deletions

‎llvm/lib/Target/AIE/AIE2InstrInfo.cpp‎

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -838,9 +838,9 @@ AIE2InstrInfo::getSpillPseudoExpandInfoByOpcode(unsigned Opcode) const {
838838
}
839839
}
840840

841-
unsigned AIE2InstrInfo::getConstantMovOpcode(MachineRegisterInfo &MRI,
842-
unsigned int Reg,
843-
APInt &Val) const {
841+
std::optional<unsigned>
842+
AIE2InstrInfo::getConstantMovOpcode(MachineRegisterInfo &MRI, unsigned int Reg,
843+
APInt &Val) const {
844844

845845
const auto &TRI =
846846
static_cast<const AIE2RegisterInfo *>(MRI.getTargetRegisterInfo());
@@ -869,13 +869,10 @@ unsigned AIE2InstrInfo::getConstantMovOpcode(MachineRegisterInfo &MRI,
869869
if (regClassMatches(AIE2::ePmDmRegClass, DstRegClass, Reg))
870870
return AIE2::MOV_PD_imm11_pseudo;
871871
}
872-
if (ImmSize <= 32) {
872+
if (ImmSize <= 32)
873873
return AIE2::MOVXM_lng_cg;
874-
}
875-
dbgs() << "Imm. Size: " << ImmSize << "\n"
876-
<< "DstRegClass ID: " << DstRegClass->getID() << "\n";
877-
llvm_unreachable("Expected imm. size <= 32 bits");
878-
dbgs() << "DstRegClass ID: " << DstRegClass->getID() << "\n";
874+
875+
return std::nullopt;
879876
}
880877

881878
unsigned AIE2InstrInfo::getScalarMovOpcode(Register DstReg,

‎llvm/lib/Target/AIE/AIE2InstrInfo.h‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -38,8 +38,9 @@ class AIE2InstrInfo : public AIE2GenInstrInfo {
3838
unsigned getOppositeBranchOpcode(unsigned Opc) const override;
3939
unsigned getJumpOpcode() const override;
4040
unsigned getPseudoMoveOpcode() const override;
41-
unsigned getConstantMovOpcode(MachineRegisterInfo &MRI, unsigned int Reg,
42-
APInt &Val) const override;
41+
std::optional<unsigned> getConstantMovOpcode(MachineRegisterInfo &MRI,
42+
unsigned int Reg,
43+
APInt &Val) const override;
4344
unsigned getScalarMovOpcode(Register DstReg, Register SrcReg) const override;
4445
unsigned getMvSclOpcode() const override;
4546
unsigned getAddrIntrinsic2D() const override;

‎llvm/lib/Target/AIE/AIE2InstructionSelector.cpp‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -458,7 +458,8 @@ bool AIE2InstructionSelector::selectStartLoop(MachineInstr &I,
458458
if (auto Const =
459459
getIConstantVRegValWithLookThrough(I.getOperand(2).getReg(), MRI)) {
460460
auto OpCode = TII.getConstantMovOpcode(MRI, DstReg, Const->Value);
461-
auto Mov = MIB.buildInstr(OpCode, {DstReg}, {})
461+
assert(OpCode && "Failed to get constant mov opcode during ISel");
462+
auto Mov = MIB.buildInstr(*OpCode, {DstReg}, {})
462463
.addImm(Const->Value.getSExtValue() - 1);
463464
I.eraseFromParent();
464465
return constrainSelectedInstRegOperands(*Mov, TII, TRI, RBI);

‎llvm/lib/Target/AIE/AIEBaseInstrInfo.cpp‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -597,14 +597,16 @@ bool AIEBaseInstrInfo::foldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
597597
return false;
598598
}
599599

600-
// Get the appropriate move-immediate opcode for the destination register
600+
// Get the appropriate move-immediate opcode for the destination register.
601+
// Bail out if no suitable opcode exists for this register/immediate combo.
601602
APInt ImmAPInt(32, ImmVal, /*isSigned=*/true);
602-
unsigned NewOpc = getConstantMovOpcode(*MRI, DstReg, ImmAPInt);
603+
std::optional<unsigned> NewOpc = getConstantMovOpcode(*MRI, DstReg, ImmAPInt);
604+
if (!NewOpc)
605+
return false;
603606

604-
// Build the new move-immediate instruction
605607
MachineBasicBlock &MBB = *UseMI.getParent();
606608
const DebugLoc &DL = UseMI.getDebugLoc();
607-
BuildMI(MBB, UseMI, DL, get(NewOpc), DstReg).addImm(ImmAPInt.getSExtValue());
609+
BuildMI(MBB, UseMI, DL, get(*NewOpc), DstReg).addImm(ImmAPInt.getSExtValue());
608610

609611
// Remove the old COPY
610612
UseMI.eraseFromParent();

‎llvm/lib/Target/AIE/AIEBaseInstrInfo.h‎

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -249,10 +249,13 @@ struct AIEBaseInstrInfo : public TargetInstrInfo {
249249
virtual unsigned getJumpOpcode() const {
250250
llvm_unreachable("Target didn't implement getJumpOpcode");
251251
}
252-
/// Return Multi-Slot Pseudo opcode based on Reg type and imm. size
253-
virtual unsigned getConstantMovOpcode(MachineRegisterInfo &MRI,
254-
unsigned int Reg, APInt &Val) const {
255-
llvm_unreachable("Target didn't implement getConstantMovOpcode");
252+
/// Return Multi-Slot Pseudo opcode based on Reg type and imm. size.
253+
/// Returns std::nullopt when no suitable opcode exists for the given
254+
/// register class / immediate combination.
255+
virtual std::optional<unsigned> getConstantMovOpcode(MachineRegisterInfo &MRI,
256+
unsigned int Reg,
257+
APInt &Val) const {
258+
return std::nullopt;
256259
}
257260
/// Return Multi-Slot Pseudo opcode based on Reg type
258261
virtual unsigned getScalarMovOpcode(Register DstReg, Register SrcReg) const {

‎llvm/lib/Target/AIE/AIEBaseInstructionSelector.cpp‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1059,7 +1059,8 @@ bool AIEBaseInstructionSelector::selectStartLoop(MachineInstr &I,
10591059
if (auto Const =
10601060
getIConstantVRegValWithLookThrough(I.getOperand(2).getReg(), MRI)) {
10611061
auto OpCode = TII.getConstantMovOpcode(MRI, DstReg, Const->Value);
1062-
auto Mov = MIB.buildInstr(OpCode, {DstReg}, {})
1062+
assert(OpCode && "Failed to get constant mov opcode during ISel");
1063+
auto Mov = MIB.buildInstr(*OpCode, {DstReg}, {})
10631064
.addImm(Const->Value.getSExtValue() - 1);
10641065
I.eraseFromParent();
10651066
return constrainSelectedInstRegOperands(*Mov, TII, TRI, RBI);
@@ -1141,7 +1142,8 @@ bool AIEBaseInstructionSelector::selectG_CONSTANT(MachineInstr &I,
11411142

11421143
APInt Imm = I.getOperand(1).getCImm()->getValue();
11431144
auto OpCode = TII.getConstantMovOpcode(MRI, DstReg, Imm);
1144-
MachineInstr &MI = *MIB.buildInstr(OpCode, {DstReg}, {})
1145+
assert(OpCode && "Failed to get constant mov opcode during ISel");
1146+
MachineInstr &MI = *MIB.buildInstr(*OpCode, {DstReg}, {})
11451147
.addImm(Imm.getSExtValue())
11461148
.getInstr();
11471149

‎llvm/lib/Target/AIE/aie2p/AIE2PInstrInfo.cpp‎

Lines changed: 6 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1186,9 +1186,9 @@ AIE2PInstrInfo::getRegOffsetSpillInstrInfoFromImmOffset(
11861186
}
11871187
}
11881188

1189-
unsigned AIE2PInstrInfo::getConstantMovOpcode(MachineRegisterInfo &MRI,
1190-
unsigned int Reg,
1191-
APInt &Val) const {
1189+
std::optional<unsigned>
1190+
AIE2PInstrInfo::getConstantMovOpcode(MachineRegisterInfo &MRI, unsigned int Reg,
1191+
APInt &Val) const {
11921192
const auto &TRI =
11931193
static_cast<const AIE2PRegisterInfo *>(MRI.getTargetRegisterInfo());
11941194
unsigned int ImmSize = Val.getSignificantBits();
@@ -1213,12 +1213,10 @@ unsigned AIE2PInstrInfo::getConstantMovOpcode(MachineRegisterInfo &MRI,
12131213
if (regClassMatches(AIE2P::mMvSclDstRegClass, DstRegClass, Reg))
12141214
return AIE2P::MOV_scalar_imm11_pseudo;
12151215
}
1216-
if (ImmSize <= 32) {
1216+
if (ImmSize <= 32)
12171217
return AIE2P::MOVXM;
1218-
}
1219-
dbgs() << "Imm. Size: " << ImmSize << "\n"
1220-
<< "DstRegClass ID: " << DstRegClass->getID() << "\n";
1221-
llvm_unreachable("Expected imm. size <= 32 bits");
1218+
1219+
return std::nullopt;
12221220
}
12231221

12241222
unsigned AIE2PInstrInfo::getScalarMovOpcode(Register DstReg,

‎llvm/lib/Target/AIE/aie2p/AIE2PInstrInfo.h‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -43,8 +43,9 @@ class AIE2PInstrInfo : public AIE2PGenInstrInfo {
4343
unsigned getOppositeBranchOpcode(unsigned Opc) const override;
4444
unsigned getJumpOpcode() const override;
4545
unsigned getPseudoMoveOpcode() const override;
46-
unsigned getConstantMovOpcode(MachineRegisterInfo &MRI, unsigned int Reg,
47-
APInt &Val) const override;
46+
std::optional<unsigned> getConstantMovOpcode(MachineRegisterInfo &MRI,
47+
unsigned int Reg,
48+
APInt &Val) const override;
4849
unsigned getScalarMovOpcode(Register DstReg, Register SrcReg) const override;
4950
unsigned getMoveToMSOpcode(MachineInstr &I,
5051
unsigned ConstTLastVal) const override;

‎llvm/lib/Target/AIE/aie2ps/AIE2PSInstrInfo.cpp‎

Lines changed: 6 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1120,9 +1120,9 @@ unsigned AIE2PSInstrInfo::getPseudoMoveOpcode() const {
11201120
return AIE2PS::PseudoMove;
11211121
}
11221122

1123-
unsigned AIE2PSInstrInfo::getConstantMovOpcode(MachineRegisterInfo &MRI,
1124-
unsigned int Reg,
1125-
APInt &Val) const {
1123+
std::optional<unsigned>
1124+
AIE2PSInstrInfo::getConstantMovOpcode(MachineRegisterInfo &MRI,
1125+
unsigned int Reg, APInt &Val) const {
11261126
const auto &TRI =
11271127
static_cast<const AIE2PRegisterInfo *>(MRI.getTargetRegisterInfo());
11281128
unsigned int ImmSize = Val.getSignificantBits();
@@ -1147,12 +1147,10 @@ unsigned AIE2PSInstrInfo::getConstantMovOpcode(MachineRegisterInfo &MRI,
11471147
if (regClassMatches(AIE2PS::mMvSclDstRegClass, DstRegClass, Reg))
11481148
return AIE2PS::MOV_scalar_imm11_pseudo;
11491149
}
1150-
if (ImmSize <= 32) {
1150+
if (ImmSize <= 32)
11511151
return AIE2PS::MOVXM_lng_cg;
1152-
}
1153-
dbgs() << "Imm. Size: " << ImmSize << "\n"
1154-
<< "DstRegClass ID: " << DstRegClass->getID() << "\n";
1155-
llvm_unreachable("Expected imm. size <= 32 bits");
1152+
1153+
return std::nullopt;
11561154
}
11571155

11581156
unsigned AIE2PSInstrInfo::getScalarMovOpcode(Register DstReg,

‎llvm/lib/Target/AIE/aie2ps/AIE2PSInstrInfo.h‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -99,8 +99,9 @@ class AIE2PSInstrInfo : public AIE2PSGenInstrInfo {
9999
unsigned getMvSclOpcode() const override;
100100
unsigned getAddSclOpcode() const override;
101101
unsigned getPseudoMoveOpcode() const override;
102-
unsigned getConstantMovOpcode(MachineRegisterInfo &MRI, unsigned int Reg,
103-
APInt &Val) const override;
102+
std::optional<unsigned> getConstantMovOpcode(MachineRegisterInfo &MRI,
103+
unsigned int Reg,
104+
APInt &Val) const override;
104105
unsigned getScalarMovOpcode(Register DstReg, Register SrcReg) const override;
105106

106107
bool isLock(unsigned Opc) const override;

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