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krishnamtibrewalakrishnamtibrewala
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[AIE2] Add stack addrspace annotation to Load/Store to stack
The work expect --aie-stack-addrspace passed to describe which AS stack is allocated
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‎llvm/lib/Target/AIE/AIE2TargetMachine.cpp

+16
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,11 @@ static cl::opt<bool> EnablePreMISchedCoalescer(
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"aie-premisched-coalescer", cl::Hidden, cl::init(true),
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cl::desc("Run the coalescer again after the pre-RA scheduler"));
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static cl::opt<unsigned> StackAddrSpace(
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"aie-stack-addrspace", cl::init(0),
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cl::desc("Specify the addrspace where the stack is allocated "
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"(5: Bank A, 6: Bank B, 7: Bank C, 8: Bank D)"));
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extern bool AIEDumpArtifacts;
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void AIE2TargetMachine::anchor() {}
@@ -259,3 +264,14 @@ bool AIE2PassConfig::addInstSelector() {
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addPass(createMachineFunctionDumperPass(/*Suffix=*/"after-isel"));
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return false;
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}
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unsigned
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AIE2TargetMachine::getAddressSpaceForPseudoSourceKind(unsigned Kind) const {
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switch (Kind) {
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case PseudoSourceValue::Stack:
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case PseudoSourceValue::FixedStack:
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return StackAddrSpace;
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default:
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return static_cast<unsigned>(AIE2::AddressSpaces::none);
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}
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}

‎llvm/lib/Target/AIE/AIE2TargetMachine.h

+1
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,7 @@ class AIE2TargetMachine : public AIEBaseTargetMachine {
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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/// PostRAScheduling is scheduled as part of PreSched2 passes.
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bool targetSchedulesPostRAScheduling() const override { return true; }
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unsigned getAddressSpaceForPseudoSourceKind(unsigned Kind) const override;
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};
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} // namespace llvm

‎llvm/test/CodeGen/AIE/aie2/schedule/vld_vld_spill.mir

+138
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,138 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
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# This file is licensed under the Apache License v2.0 with LLVM Exceptions.
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# See https://llvm.org/LICENSE.txt for license information.
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# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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#
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# (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates
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# RUN: llc -march=aie2 -run-pass=postmisched %topdown-multi --aie-stack-addrspace=5 %s -o - | FileCheck -check-prefixes=STACK-BANK-A %s
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# RUN: llc -march=aie2 -run-pass=postmisched %topdown-multi --aie-stack-addrspace=6 %s -o - | FileCheck -check-prefixes=STACK-BANK-B %s
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# This test checks scheduling of LD_SPILL / VLD_SPILL or VLDB
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---
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name: VLDA_Spill_VLD_1
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alignment: 16
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 32, alignment: 32 }
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body: |
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bb.0.entry:
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; STACK-BANK-A-LABEL: name: VLDA_Spill_VLD_1
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; STACK-BANK-A: $wl1 = VLDA_dmw_lda_w_ag_spill -96, implicit $sp :: (load (s256) from %stack.0, addrspace 5)
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; STACK-BANK-A-NEXT: $wl2 = VLDB_dmw_ldb_ag_idx_imm killed $p0, 0 :: (load (<8 x s32>), addrspace 5)
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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;
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; STACK-BANK-B-LABEL: name: VLDA_Spill_VLD_1
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; STACK-BANK-B: BUNDLE implicit-def $wl1, implicit-def $wl2, implicit $sp, implicit killed $p0 {
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; STACK-BANK-B-NEXT: $wl1 = VLDA_dmw_lda_w_ag_spill -96, implicit $sp :: (load (s256) from %stack.0, addrspace 6)
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; STACK-BANK-B-NEXT: $wl2 = VLDB_dmw_ldb_ag_idx_imm killed $p0, 0 :: (load (<8 x s32>), addrspace 5)
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; STACK-BANK-B-NEXT: }
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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$wl1 = VLDA_dmw_lda_w_ag_spill -96, implicit $sp :: (load (s256) from %stack.0)
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$wl2 = VLDB_dmw_ldb_ag_idx_imm $p0, 0 :: (load (<8 x s32>), addrspace 5)
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...
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---
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name: VLDA_Spill_VLD_2
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alignment: 16
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 32, alignment: 32 }
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body: |
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bb.0.entry:
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; STACK-BANK-A-LABEL: name: VLDA_Spill_VLD_2
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; STACK-BANK-A: BUNDLE implicit-def $wl1, implicit-def $wl2, implicit $sp, implicit killed $p0 {
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; STACK-BANK-A-NEXT: $wl1 = VLDA_dmw_lda_w_ag_spill -96, implicit $sp :: (load (s256) from %stack.0, addrspace 5)
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; STACK-BANK-A-NEXT: $wl2 = VLDB_dmw_ldb_ag_idx_imm killed $p0, 0 :: (load (<8 x s32>), addrspace 6)
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; STACK-BANK-A-NEXT: }
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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;
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; STACK-BANK-B-LABEL: name: VLDA_Spill_VLD_2
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; STACK-BANK-B: $wl1 = VLDA_dmw_lda_w_ag_spill -96, implicit $sp :: (load (s256) from %stack.0, addrspace 6)
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; STACK-BANK-B-NEXT: $wl2 = VLDB_dmw_ldb_ag_idx_imm killed $p0, 0 :: (load (<8 x s32>), addrspace 6)
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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$wl1 = VLDA_dmw_lda_w_ag_spill -96, implicit $sp :: (load (s256) from %stack.0)
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$wl2 = VLDB_dmw_ldb_ag_idx_imm $p0, 0 :: (load (<8 x s32>), addrspace 6)
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...
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---
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name: LDA_Spill_VLD_1
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alignment: 16
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 32, alignment: 32 }
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body: |
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bb.0.entry:
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; STACK-BANK-A-LABEL: name: LDA_Spill_VLD_1
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; STACK-BANK-A: $r0 = LDA_dms_spill -28, implicit $sp :: (load (s32) from %stack.0, addrspace 5)
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; STACK-BANK-A-NEXT: $wl2 = VLDB_dmw_ldb_ag_idx_imm killed $p0, 0 :: (load (<8 x s32>), addrspace 5)
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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;
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; STACK-BANK-B-LABEL: name: LDA_Spill_VLD_1
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; STACK-BANK-B: BUNDLE implicit-def $r0, implicit-def $wl2, implicit $sp, implicit killed $p0 {
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; STACK-BANK-B-NEXT: $r0 = LDA_dms_spill -28, implicit $sp :: (load (s32) from %stack.0, addrspace 6)
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; STACK-BANK-B-NEXT: $wl2 = VLDB_dmw_ldb_ag_idx_imm killed $p0, 0 :: (load (<8 x s32>), addrspace 5)
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; STACK-BANK-B-NEXT: }
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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$r0 = LDA_dms_spill -28, implicit $sp :: (load (s32) from %stack.0)
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$wl2 = VLDB_dmw_ldb_ag_idx_imm $p0, 0 :: (load (<8 x s32>), addrspace 5)
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...
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---
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name: LDA_Spill_VLD_2
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alignment: 16
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 32, alignment: 32 }
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body: |
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bb.0.entry:
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; STACK-BANK-A-LABEL: name: LDA_Spill_VLD_2
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; STACK-BANK-A: BUNDLE implicit-def $r0, implicit-def $wl2, implicit $sp, implicit killed $p0 {
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; STACK-BANK-A-NEXT: $r0 = LDA_dms_spill -28, implicit $sp :: (load (s32) from %stack.0, addrspace 5)
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; STACK-BANK-A-NEXT: $wl2 = VLDB_dmw_ldb_ag_idx_imm killed $p0, 0 :: (load (<8 x s32>), addrspace 6)
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; STACK-BANK-A-NEXT: }
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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; STACK-BANK-A-NEXT: NOP
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;
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; STACK-BANK-B-LABEL: name: LDA_Spill_VLD_2
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; STACK-BANK-B: $r0 = LDA_dms_spill -28, implicit $sp :: (load (s32) from %stack.0, addrspace 6)
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; STACK-BANK-B-NEXT: $wl2 = VLDB_dmw_ldb_ag_idx_imm killed $p0, 0 :: (load (<8 x s32>), addrspace 6)
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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; STACK-BANK-B-NEXT: NOP
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$r0 = LDA_dms_spill -28, implicit $sp :: (load (s32) from %stack.0)
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$wl2 = VLDB_dmw_ldb_ag_idx_imm $p0, 0 :: (load (<8 x s32>), addrspace 6)
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...

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