mlir-aie/test/dialect/AIE/bad_dma_op.mlir at 3308c2d638fdcb1fe6b64a2dedfb1287182d04e8 · Xilinx/mlir-aie · GitHub

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//===- dma_op.mlir --------------------------------------------*- MLIR -*-===//
//
// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
// (c) Copyright 2023 Advanced Micro Devices, Inc.
//
//===----------------------------------------------------------------------===//

// RUN: not aie-opt -split-input-file %s 2>&1 | FileCheck %s

// CHECK: error: 'aie.dma' op DMAOp can only appear in single block region
module {
  aie.device(npu1) {
    %tile_0_1 = aie.tile(0, 1)
    %objFifo_in0_cons_buff_0 = aie.buffer(%tile_0_1) {address = 0 : i32} : memref<16xi32>
    %objFifo_in0_cons_prod_lock = aie.lock(%tile_0_1, 0) {init = 2 : i32}
    %objFifo_in0_cons_cons_lock = aie.lock(%tile_0_1, 1) {init = 0 : i32}

    %memtile_dma_0_1 = aie.memtile_dma(%tile_0_1) {
    ^bb0:
      aie.dma(S2MM, 0) [{
        aie.use_lock(%objFifo_in0_cons_prod_lock, AcquireGreaterEqual, 1)
        aie.dma_bd(%objFifo_in0_cons_buff_0 : memref<16xi32>, 0, 16)
        aie.use_lock(%objFifo_in0_cons_cons_lock, Release, 1)
      }]
      aie.next_bd ^bb1
    ^bb1:
      aie.end
    }

  }
}

// -----

// CHECK: error: 'aie.dma_bd' op Packet ID field can only hold 5 bits.
module {
  aie.device(npu1) {
    %tile14 = aie.tile(1, 4)
    %buf14 = aie.buffer(%tile14) { sym_name = "buf14" } : memref<128xi32>
    %mem14 = aie.mem(%tile14) {
      %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^end)
      ^bd0:
        aie.dma_bd(%buf14 : memref<128xi32>, 0, 128, [<size = 1, stride = 128>]) {packet = #aie.packet_info<pkt_type = 7, pkt_id = 33>}
        aie.next_bd ^end
      ^end:
        aie.end
    }
  }
}

// -----

// CHECK: For element widths larger than the address granularity (4 bytes), innermost dim stride must be 1
module {
  aie.device(npu1) {
    %tile14 = aie.tile(1, 4)
    %buf14 = aie.buffer(%tile14) { sym_name = "buf14" } : memref<128x!aiex.bfp<"v8bfp16ebs8">>
    %mem14 = aie.mem(%tile14) {
      %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^end)
      ^bd0:
        aie.dma_bd(%buf14 : memref<128x!aiex.bfp<"v8bfp16ebs8">>, 0, 128, [<size = 8, stride = 16>]) {}
        aie.next_bd ^end
      ^end:
        aie.end
    }
  }
}

// -----

// Sub-word innermost contiguous run on i8: innermost size=2 elements * 1 byte
// = 2 bytes, sub-word and unrealizable by 32-bit-granularity DMA.
// CHECK: 2 elements at 1 bytes each equal 2 bytes, which is not divisible by 4
module {
  aie.device(npu1) {
    %tile14 = aie.tile(1, 4)
    %buf14 = aie.buffer(%tile14) { sym_name = "buf14" } : memref<128xi8>
    %mem14 = aie.mem(%tile14) {
      %srcDma = aie.dma_start("MM2S", 0, ^bd0, ^end)
      ^bd0:
        aie.dma_bd(%buf14 : memref<128xi8>, 0, 24, [<size = 3, stride = 4>, <size = 2, stride = 1>])
        aie.next_bd ^end
      ^end:
        aie.end
    }
  }
}