Skip to content

Commit 7e75546

Browse files
authored
Adding magika reference design (#2846)
1 parent dda2755 commit 7e75546

38 files changed

Lines changed: 812893 additions & 0 deletions
Lines changed: 136 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,136 @@
1+
#
2+
# This file is licensed under the Apache License v2.0 with LLVM Exceptions.
3+
# See https://llvm.org/LICENSE.txt for license information.
4+
# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
5+
#
6+
# Copyright (C) 2024, Advanced Micro Devices, Inc.
7+
8+
srcdir := $(shell dirname $(realpath $(firstword $(MAKEFILE_LIST))))
9+
10+
include ${srcdir}/../../makefile-common
11+
12+
targetname = group0
13+
devicename ?= $(if $(filter 1,$(NPU2)),npu2,npu)
14+
15+
mlirFileName = aie
16+
17+
aie_py_src=${targetname}.py
18+
use_placed?=1
19+
CHESS ?= false
20+
trace_size = 16384
21+
colshift ?= $(if $(filter npu,$(devicename)),1,0)
22+
23+
ifeq (${use_placed}, 1)
24+
aie_py_src=${targetname}_placed.py
25+
endif
26+
27+
#ifeq (${targetname}, group2)
28+
#alloc_scheme=--alloc-scheme=basic-sequential
29+
#else
30+
#alloc_scheme=--alloc-scheme=bank-aware
31+
#endif
32+
33+
alloc_scheme=--alloc-scheme=basic-sequential
34+
35+
VPATH := ${srcdir}/kernels
36+
37+
all: build/aie.mlir
38+
39+
build/${mlirFileName}.mlir: ${srcdir}/${aie_py_src}
40+
mkdir -p ${@D}
41+
python3 $< -d ${devicename} > $@
42+
43+
build/${mlirFileName}_trace.mlir: ${srcdir}/${aie_py_src}
44+
mkdir -p ${@D}
45+
python3 $< -d ${devicename} -t ${trace_size} > $@
46+
47+
build/%.o: %.cc
48+
mkdir -p ${@D}
49+
ifeq (${devicename}, npu)
50+
ifeq ($(CHESS), true)
51+
cd ${@D} && xchesscc_wrapper ${CHESSCCWRAP2_FLAGS} -c $< -o ${@F};
52+
else
53+
cd ${@D} && ${PEANO_INSTALL_DIR}/bin/clang ${PEANOWRAP2_FLAGS} -c $< -o ${@F}
54+
endif
55+
else ifeq (${devicename}, npu2)
56+
ifeq ($(CHESS), true)
57+
cd ${@D} && xchesscc_wrapper ${CHESSCCWRAP2P_FLAGS} -c $< -o ${@F};
58+
else
59+
cd ${@D} && ${PEANO_INSTALL_DIR}/bin/clang ${PEANOWRAP2P_FLAGS} -c $< -o ${@F}
60+
endif
61+
else
62+
echo "Device type not supported"
63+
endif
64+
65+
build/group0a.o: group0.cc
66+
mkdir -p ${@D}
67+
ifeq (${devicename}, npu)
68+
ifeq ($(CHESS), true)
69+
cd ${@D} && xchesscc_wrapper ${CHESSCCWRAP2_FLAGS} -DGROUPA -c $< -o ${@F};
70+
else
71+
cd ${@D} && ${PEANO_INSTALL_DIR}/bin/clang ${PEANOWRAP2_FLAGS} -DGROUPA -c $< -o ${@F}
72+
endif
73+
else ifeq (${devicename}, npu2)
74+
ifeq ($(CHESS), true)
75+
cd ${@D} && xchesscc_wrapper ${CHESSCCWRAP2P_FLAGS} -DGROUPA -c $< -o ${@F};
76+
else
77+
cd ${@D} && ${PEANO_INSTALL_DIR}/bin/clang ${PEANOWRAP2P_FLAGS} -DGROUPA -c $< -o ${@F}
78+
endif
79+
else
80+
echo "Device type not supported"
81+
endif
82+
83+
build/group0b.o: group0.cc
84+
mkdir -p ${@D}
85+
ifeq (${devicename}, npu)
86+
ifeq ($(CHESS), true)
87+
cd ${@D} && xchesscc_wrapper ${CHESSCCWRAP2_FLAGS} -DGROUPB -c $< -o ${@F};
88+
else
89+
cd ${@D} && ${PEANO_INSTALL_DIR}/bin/clang ${PEANOWRAP2_FLAGS} -DGROUPB -c $< -o ${@F}
90+
endif
91+
else ifeq (${devicename}, npu2)
92+
ifeq ($(CHESS), true)
93+
cd ${@D} && xchesscc_wrapper ${CHESSCCWRAP2P_FLAGS} -DGROUPB -c $< -o ${@F};
94+
else
95+
cd ${@D} && ${PEANO_INSTALL_DIR}/bin/clang ${PEANOWRAP2P_FLAGS} -DGROUPB -c $< -o ${@F}
96+
endif
97+
else
98+
echo "Device type not supported"
99+
endif
100+
101+
#build/final.xclbin: build/${mlirFileName}.mlir build/group0a.o build/group0b.o build/group1.o build/group2.o
102+
build/final.xclbin: build/${mlirFileName}.mlir build/group0a.o build/group0b.o build/group2.o
103+
mkdir -p ${@D}
104+
ifeq ($(CHESS), true)
105+
cd ${@D} && aiecc.py -v --aie-generate-xclbin --no-compile-host --xclbin-name=${@F} ${alloc_scheme} \
106+
--aie-generate-npu-insts --npu-insts-name=insts.bin $(<:%=../%)
107+
else
108+
cd ${@D} && aiecc.py -v --aie-generate-xclbin --no-compile-host --xclbin-name=${@F} ${alloc_scheme} \
109+
--no-xchesscc --no-xbridge \
110+
--aie-generate-npu-insts --npu-insts-name=insts.bin $(<:%=../%)
111+
endif
112+
113+
build/final_trace.xclbin: build/${mlirFileName}_trace.mlir build/group0a.o build/group0b.o build/group2.o
114+
mkdir -p ${@D}
115+
ifeq ($(CHESS), true)
116+
cd ${@D} && aiecc.py -v --aie-generate-xclbin --no-compile-host --xclbin-name=${@F} ${alloc_scheme} \
117+
--aie-generate-npu-insts --npu-insts-name=insts.bin $(<:%=../%)
118+
else
119+
cd ${@D} && aiecc.py -v --aie-generate-xclbin --no-compile-host --xclbin-name=${@F} ${alloc_scheme} \
120+
--no-xchesscc --no-xbridge \
121+
--aie-generate-npu-insts --npu-insts-name=insts.bin $(<:%=../%)
122+
endif
123+
124+
run_py: build/final.xclbin
125+
#${powershell} python3 ${srcdir}/test.py -v 1 -x build/final.xclbin -i build/insts.bin -k MLIR_AIE
126+
${powershell} python3 ${srcdir}/test_${targetname}.py -v 1 -x build/final.xclbin -i build/insts.bin -k MLIR_AIE
127+
128+
trace_py: build/final_trace.xclbin
129+
${powershell} python3 ${srcdir}/test_${targetname}.py -v 1 -x build/final_trace.xclbin -i build/insts.bin -k MLIR_AIE -t ${trace_size}
130+
${srcdir}/../../../python/utils/trace/parse.py --input log/trace_magika.txt --mlir build/${mlirFileName}_trace.mlir --colshift ${colshift} --output trace_${targetname}.json
131+
${srcdir}/../../../python/utils/trace/get_trace_summary.py --input trace_${targetname}.json
132+
133+
clean:
134+
rm -rf build *.elf* *.lst *.bif ${mlirFileName}.mlir.prj log .xclbin sim \
135+
chess* *.o insts.bin \
136+
*.log aie_partition.json *.bin BOOT.BIN _x test.exe
Lines changed: 50 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,50 @@
1+
<!---//===- README.md --------------------------*- Markdown -*-===//
2+
//
3+
// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
// Copyright (C) 2024, Advanced Micro Devices, Inc.
8+
//
9+
//===----------------------------------------------------------------------===//-->
10+
11+
# <ins>Magika</ins>
12+
## Introduction
13+
This implements parts of the magika AI-powered file type detection network described under https://github.com/google/magika.
14+
15+
NOTE: Currently, the design supports standalone group0 and group2 blocks with an placeholder for the group1 component.
16+
17+
18+
## Source Files Overview
19+
```
20+
.
21+
+-- c # C reference
22+
+-- data # Input stimulus and output reference
23+
+-- inc # Include files, such as LUT headers and sub kernel functions
24+
+-- kernels # group kernel functions
25+
+-- py # python utilities for extrapolating stimulus from onnx file
26+
+-- group0_placed.py # Placed group 0 design
27+
+-- group1_placed.py # Placed group 1 design (placeholder)
28+
+-- group2_placed.py # Placed group 2 design
29+
+-- Makefile #
30+
+-- README.md # This file.
31+
+-- run.lit # For LLVM Integrated Tester (LIT) of the design.
32+
+-- test_group0.py # Python code testbench for the group 0 design example
33+
+-- test_group2.py # Python code testbench for the group 2 design example
34+
```
35+
36+
## Compilation
37+
To compile the design for group 0 and run it.
38+
```shell
39+
make run_py
40+
```
41+
42+
To compile the placed design for group 2:
43+
```shell
44+
make targetname=group2 run_py
45+
```
46+
47+
To build the design to generate trace, replace `run_y` with `trace_py`
48+
```shell
49+
make targetname=group0 trace_py
50+
```
Lines changed: 74 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,74 @@
1+
# (c) Copyright 2019-2022 Xilinx, Inc. All rights reserved.
2+
# (c) Copyright 2022-2025 Advanced Micro Devices, Inc. All rights reserved.
3+
#
4+
# This file contains confidential and proprietary information
5+
# of Xilinx, Inc. and is protected under U.S. and
6+
# international copyright and other intellectual property
7+
# laws.
8+
#
9+
# DISCLAIMER
10+
# This disclaimer is not a license and does not grant any
11+
# rights to the materials distributed herewith. Except as
12+
# otherwise provided in a valid license issued to you by
13+
# Xilinx, and to the maximum extent permitted by applicable
14+
# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
15+
# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
16+
# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
17+
# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
18+
# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
19+
# (2) Xilinx shall not be liable (whether in contract or tort,
20+
# including negligence, or under any other theory of
21+
# liability) for any loss or damage of any kind or nature
22+
# related to, arising under or in connection with these
23+
# materials, including for any direct, or any indirect,
24+
# special, incidental, or consequential loss or damage
25+
# (including loss of data, profits, goodwill, or any type of
26+
# loss or damage suffered as a result of any action brought
27+
# by a third party) even if such damage or loss was
28+
# reasonably foreseeable or Xilinx had been advised of the
29+
# possibility of the same.
30+
#
31+
# CRITICAL APPLICATIONS
32+
# Xilinx products are not designed or intended to be fail-
33+
# safe, or for use in any application requiring fail-safe
34+
# performance, such as life-support or safety devices or
35+
# systems, Class III medical devices, nuclear facilities,
36+
# applications related to the deployment of airbags, or any
37+
# other applications that could lead to death, personal
38+
# injury, or severe property or environmental damage
39+
# (individually and collectively, "Critical
40+
# Applications"). Customer assumes the sole risk and
41+
# liability of any use of Xilinx products in Critical
42+
# Applications, subject only to applicable laws and
43+
# regulations governing limitations on product liability.
44+
#
45+
# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
46+
# PART OF THIS FILE AT ALL TIMES.
47+
48+
all: test_groups.x run_groups
49+
50+
groups: test_groups.x run_groups
51+
52+
.PHONY: clean run
53+
54+
test.x: test_magika_v3p3.c magika_v3p3.c
55+
@g++ -DMAGIKA_TOP test_magika_v3p3.c magika_v3p3.c -o test.x ;\
56+
chmod a+x test.x
57+
58+
test_groups.x: test_groups.c magika_v3p3.c
59+
@g++ test_groups.c magika_v3p3.c -o test_groups.x ;\
60+
chmod a+x test_groups.x
61+
62+
63+
get_sqnr.x: get_sqnr.cpp
64+
@g++ get_sqnr.cpp -o get_sqnr.x ;\
65+
chmod a+x get_sqnr.x
66+
67+
run:
68+
./test.x
69+
70+
run_groups: test_groups.x
71+
./test_groups.x
72+
73+
clean:
74+
@rm -rf ./*.x
Lines changed: 114 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,114 @@
1+
// (c) Copyright 2019-2022 Xilinx, Inc. All rights reserved.
2+
// (c) Copyright 2022-2025 Advanced Micro Devices, Inc. All rights reserved.
3+
//
4+
// This file contains confidential and proprietary information
5+
// of Xilinx, Inc. and is protected under U.S. and
6+
// international copyright and other intellectual property
7+
// laws.
8+
//
9+
// DISCLAIMER
10+
// This disclaimer is not a license and does not grant any
11+
// rights to the materials distributed herewith. Except as
12+
// otherwise provided in a valid license issued to you by
13+
// Xilinx, and to the maximum extent permitted by applicable
14+
// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
15+
// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
16+
// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
17+
// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
18+
// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
19+
// (2) Xilinx shall not be liable (whether in contract or tort,
20+
// including negligence, or under any other theory of
21+
// liability) for any loss or damage of any kind or nature
22+
// related to, arising under or in connection with these
23+
// materials, including for any direct, or any indirect,
24+
// special, incidental, or consequential loss or damage
25+
// (including loss of data, profits, goodwill, or any type of
26+
// loss or damage suffered as a result of any action brought
27+
// by a third party) even if such damage or loss was
28+
// reasonably foreseeable or Xilinx had been advised of the
29+
// possibility of the same.
30+
//
31+
// CRITICAL APPLICATIONS
32+
// Xilinx products are not designed or intended to be fail-
33+
// safe, or for use in any application requiring fail-safe
34+
// performance, such as life-support or safety devices or
35+
// systems, Class III medical devices, nuclear facilities,
36+
// applications related to the deployment of airbags, or any
37+
// other applications that could lead to death, personal
38+
// injury, or severe property or environmental damage
39+
// (individually and collectively, "Critical
40+
// Applications"). Customer assumes the sole risk and
41+
// liability of any use of Xilinx products in Critical
42+
// Applications, subject only to applicable laws and
43+
// regulations governing limitations on product liability.
44+
45+
#include <math.h>
46+
#include <stdio.h>
47+
#include <stdlib.h>
48+
49+
//-----------------------------------------
50+
// test FFTz model
51+
//-----------------------------------------
52+
int main(int argc, char *argv[]) {
53+
54+
if (argc != 3) {
55+
printf("\n\tUsage: get_sqnr( ref_file_name, dut_file_name )\n\n");
56+
exit(-1);
57+
}
58+
59+
FILE *fpin0 = fopen(argv[1], "rt");
60+
FILE *fpin1 = fopen(argv[2], "rt");
61+
62+
if (fpin0 == NULL) {
63+
printf(" Error! Unable to open the ref file = %s\n", argv[1]);
64+
exit(-1);
65+
}
66+
67+
if (fpin1 == NULL) {
68+
printf(" Error! Unable to open the dut file = %s\n", argv[2]);
69+
exit(-1);
70+
}
71+
72+
float ref;
73+
double sumpwr = 0;
74+
double sumdif = 0;
75+
int din;
76+
77+
int dut_int;
78+
float *dut_p = (float *)&dut_int;
79+
80+
long long samplecnt = 0;
81+
82+
printf("Computing EVM for %s against %s ...", argv[2], argv[1]);
83+
84+
while (fscanf(fpin0, "%f", &ref) == 1) {
85+
86+
samplecnt += 1;
87+
88+
if (fscanf(fpin1, "%d", &din) == 1) {
89+
90+
dut_int = din;
91+
92+
float dut = *dut_p;
93+
94+
double a = ref - dut;
95+
double b = ref;
96+
sumpwr += b * b;
97+
sumdif += a * a;
98+
} else {
99+
printf("\n\nWarning: DUT file is shorten than ref. Sample Cnt = %lld.\n",
100+
samplecnt);
101+
break;
102+
}
103+
}
104+
105+
if (sumdif == 0) {
106+
printf("Input Files Bit-true Match.\n");
107+
} else {
108+
// printf("sum diff = %e, sum_pwr = %e\n", sumdif, sumpwr);
109+
printf("MSE = %.1f dBc\n", 10 * log10(sumdif / sumpwr));
110+
}
111+
112+
fclose(fpin0);
113+
fclose(fpin1);
114+
}

0 commit comments

Comments
 (0)