mobilenet v3 example design improvements

[jackl-xilinx]

Remaining action items prior to merging

• Resolve bottleneck_A data mismatch (delta: 12) - leave as passing/ acceptable for now
• Resolve top level main data mismatch (delta: 9) - leave as passing/ acceptable for now
• Fix sub tests in bottleneck A (specifically bn8_9 as this issue may help solve data mismatch issue. at the moment, there's in an inherent mismatch in the bottom 7 rows of the 14x14 data)
• Test tracing for main design (maybe add it to bottleneck blocks as well)

2nd phase of updates

• Integrate vectorized kernels from existing aie_kernels/aie2
• Integrate vectorized kernels from procyon effort
• Further improve build options and design hierarchy (already added hierarchy for A, B, C)
• Refactor so static L1/L2 kernel variant and non-static variant are more easily targeted during build