Bump externals/llvm-project from d21b5c8 to c31e470
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Bumps [externals/llvm-project](https://github.com/Xilinx/llvm-aie) from `d21b5c8` to `c31e470`. - [Release notes](https://github.com/Xilinx/llvm-aie/releases) - [Commits](Xilinx/llvm-aie@d21b5c8...c31e470) --- updated-dependencies: - dependency-name: externals/llvm-project dependency-version: c31e470e0ee34da33ad1097edbabc94741f45a4e dependency-type: direct:production ... Signed-off-by: dependabot[bot] <[email protected]>
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Bumps externals/llvm-project from
d21b5c8toc31e470.Commits
c31e470[AIEX] Add support for unsigned stepped immediates43f5b92[AIE2P] enable loop aware reg rewritinge67c202[AIEX] ignore reg pressure in machine scheduler19035ef[TableGen] IgnoreRegPressure option in Tablegenc96dab2[AIE2P] Allow spilling vector/accumulator registers to registers instead of m...5bb80d1[AIE2P][unit-test] added reg alloc unit-testsDependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting
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