5 Day Workshop to develop a RISC-V Core in TL-Verilog. Core supports RV32I Base Instruction set!
See the working makerchip IDE here: https://makerchip.com/sandbox/0DkfBhvQQ/0oYhXqW
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Lab assignments for the MYTH (Microprocessor For You in Thirty Hours) RISC-V CPU Workshop
alexmanle/MYTH_RISCV
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Lab assignments for the MYTH (Microprocessor For You in Thirty Hours) RISC-V CPU Workshop