feat(turbo): add AVX-512 FP16 distance kernels

[richyreachy]

Summary

Add native AVX-512 FP16 distance implementations for Turbo.

This PR adds:

• Native AVX-512 FP16 kernels for:
  • Squared Euclidean distance
  • Inner product distance
  • Cosine distance
• Single-vector and batched distance implementations
• Raw FP16 squared-Euclidean dispatch
• Runtime gating using the AVX512_FP16 CPU feature
• Build-time gating to avoid selecting kernels when they were not compiled with AVX-512 FP16 support
• Automatic dispatch priority ahead of the existing FP16-to-FP32 AVX-512 fallback
• CMake compilation with the AVX-512 FP16 architecture flags
• Unit-test coverage comparing AVX-512 FP16 results with scalar kernels across metrics and SIMD boundary dimensions

Implementation details

The kernels process 32 FP16 elements per AVX-512 register and use native FP16 fused multiply-add instructions. Two accumulators are used to improve instruction-level parallelism.

Remaining elements are accumulated in FP32. The horizontal reduction also converts partial FP16 sums to FP32 before reduction to limit additional precision loss.

The existing AVX-512, AVX2, and scalar implementations remain as fallbacks on unsupported CPUs.