VCD files do not display glitches and can get extremely confusing

[whitequark]

Self-contained but not quite minimal reproducer:
repro.zip

[whitequark]

@wanda-phi has narrowed down the issue to the two underlying causes (thanks!). These are:

1. Circuits that provide combinational feedback from control to status signals, when used together with testbenches that use .get() and .set(), easily cause race conditions.
2. The VCD files do not display glitches that arise from these race conditions.

It is much easier to tackle (2) alone so that's what we should do.

[whitequark]

In this particular case, the race condition is:

1. A posedge causes a status signal to be asserted.
2. A testbench samples it after the posedge using get() and manipulates a control signal. (This is violating Amaranth's execution model: the testbench is not acting like a synchronous circuit.)
3. The change to the control signal causes the status signal to be deasserted again.
4. On the next posedge, the circuit acts on the deasserted value of the status signal, missing an event.