Basic CPU card for SMD2000 project
This is the basic CPU card for the SMD2000 "BUSHFIRE" project, a mini-DTX sized Amiga 2000.
Official project information can be found at Amiga Retro Brisbane projects page:
https://www.amigaretro.com/projects/
The card incorporates the A500_8MB_ide2 project for autobooting IDE and 8 mb fast ram. https://github.com/OlegMishin/A500_8MB_ide2
Design is open source hardware.
- Any and all derivative designs must also be open source.
- No person, business, or other entity associated with this design shall be liable for any damages incurred by anyone as a result of using this design. If you do not accept this condition do not build the project.
- Free for private use by anyone.
- Free for anyone to make for sale by anyone.
- CERN Open Hardware Licence Version 2 - Strongly Reciprocal CERN-OHL-S) license applies, subject to conditions 1-4 above.
- Any portions of this design from other projects shall be licensed according to their respective licenses if their licenses are not compatible with CERN-OHL-S or the conditions above.
- All Other Rights Reserved.
You need some method of programming the Microchip (Atmel) ATF1508-AS CPLD. I used a parallel (LPT) byteblaster cable running from a Windows XP box and have detailed the method below.
To make a complete SMD2000 you also need to build a motherboard and an Agnus card. They are documented separately. This project should also work in a normal A2000 but this is not tested.
The SMD2000 project requires a donor Amiga; either an A500, A500+, A2000, or A600 plus a Gary.
If you intend to use the Kicad files you will need the SMD2000 symbol and footprint libraries. They are included in the SMD2000 motherboard package. You will need to edit the path to the libraries in Kicad.
Motherboard: https://github.com/gazzmaniac/SMD2000/
2 MB Agnus card: https://github.com/gazzmaniac/SMD2000_Agnus2MB
1 MB SMD Agnus card: https://github.com/gazzmaniac/SMD2000_Agnus_1MB
1 MB TTH Agnus card: https://github.com/gazzmaniac/SMD2000_Agnus_1MB_TTH
Quartus II Web Edition v13.0sp1 https://www.intel.com/content/www/us/en/collections/products/fpga/software/downloads.html?edition=web&platform=windows Scroll down to version 13.1 then change the dropdown to get version 13.0sp1
ATMEL utilities - need an account (free) https://www.microchip.com/en-us/development-tool/POF2JED https://www.microchip.com/en-us/development-tool/WinCUPL
https://www.microchip.com/en-us/development-tool/ATMISP
https://github.com/MattisLind/82S100replacement?tab=readme-ov-file
https://github.com/OlegMishin/A500_8MB_ide2
https://aminet.net/package/disk/misc/oktapus
https://aminet.net/package/driver/media/IDEfix97
Recommended you get gold fingers and bevelled edge for the edge connector.
When using to test the motherboard I suggested populating only C100, C101, the CPU socket and CPU. It'll work quite happily just with those components. One less system to troubleshoot when you're getting running the first time. When everything else is working come back and install all the other components.
CN650 CPU_EXT header matches CN650 on SMD2000. You don't need to populate this header. These signals are not present on the CPU slot. JP1-JP5 allow you to choose which signal is used, they are all defaulted to using the the card as a coprocessor card, i.e. the same as if it was in the A2000 coprocessor slot. There would generally be no reason to change them. This is discussed further on the schematics. As far as I can tell the E clock (1/10 of the CPU clock, used for the I/O timing) is generated with the A2000 CPU not the coprocessor. It's generated by the 68000 on this card instead but be aware you may need to make a circuit to generate E if you use a "real" third party CPU accelerator card with the SMD2000 motherboard.
JP6-8 are on the FC[0..2] lines, they are only there because they are on the OpenAmiga2000CoProAdapter and I don't know why, so I put them in too. I have had no need to open them and they may get removed at a future revision.
JP11 is a header for external CPU clock. This could be used to J950 on motherboard if the 14 MHz clock is used to overclock the CPU (with a suitable Agnus). There is no need to populate this header unless you intend to mess around with the CPU clock.
Added a 3.3v rail for future expansion. It does nothing at the moment (and nor does JP9). Don't populate C2, C3, CN2, or U140.
RAM and IDE expansion copied from A500_8MB_ide2 project, link is above. Ram is KM416C4104AS-6 same as A500_8MB_ide2. It's a 5V 4Mbitx16 chip in TSSOP-II package. It was relatively hard to find; I ended up tracking some down using UTSource, it was expensive at $20 for four but it seems to work fine. I'm sure others will know of a better source.
Jumpers J164 & J165 are equivalent to JP3 on the A500_8MB_ide2 but are set up a little differently to handle _CFG_IN and _COPCFG lines correctly and allow for easy use of external switches to disable the card (and to simplify a mindfuck):
| Mode | JP164 | JP165 | JP166 |
|---|---|---|---|
| ENABLED | 1-2 OR 2-3 | 1-2 | NC |
| DISABLED | NC | NC or 2-3 | NC |
| FLASHROM | 1-2 OR 2-3 | 1-2 | 1-2 |
J161 AUTOBOOT is same as J1 on A500_8MB_ide2. Close this jumper to autoboot using the Oktapussy driver on the ROM.
It is easy to set up external switches for the jumpers. I have one SPST switch for J161 AUTOBOOT (to disable the HDD) and one DPDT switch for J164/165 to disable the card entirely.
Modified A500_8MB_ide2 IDE interface so cable select works. See below.
There are no instructions on how to compile the verilog and program the CPLD on the A500_8MB_ide2 github. This is what I did to get mine running.
I used a PC with an LPT port running WindowsXP to program it.
I made a ByteBlaster cable same as the one here: https://github.com/MattisLind/82S100replacement?tab=readme-ov-file
There is no need for it to look rough; mine has the resistors are inside heatshrink inside a DB25 shell, and it terminates in a header - for an extra 10 minutes work it looks bought.
I also cut up a USB cable and soldered headers to the +5V line so I could use the XP box's USB to supply power to the board while programming.
The author of the A500_8MB_ide2 project didn't make the compiled *.jed file available to program the CPLD. It's a bit of a stuff around if you haven't compiled a *.jed file before, and there isn't great documentation about how to do it, so I have compiled it and included it in this package. The *.jed file is not my work, it's the work of the author OlegMishin; all I did was compile it.
If you wish to compile it yourself this is what you need to do without spending money:
Download and install Intel Quartus II Web Edition v13.0sp1 from here: https://www.intel.com/content/www/us/en/collections/products/fpga/software/downloads.html?edition=web&platform=windows
Download the A500_8MB_ide2 project from https://github.com/OlegMishin/A500_8MB_ide2/
Open the file /firmware/v100/A500_8MB_ide in Quartus II and compile for 7128STC100 (they are equivalent parts, refer POF2JED application note). This will create a bunch of files in /firmware/v100/output_files; you are interested in the file A500_8mb_ide2.pof.
Then download POF2JED from: https://www.microchip.com/en-us/development-tool/POF2JED You'll need to register for an account, it's free. Install it on your XP box.
Copy the file A500_8mb_ide2.pof to C:\POF2JED\work (or wherever you installed POF2JED); it's funny about long file names with spaces. Open A500_8mb_ide2.pof and convert to A500_8mb_ide2.jed.
Use AtmelISP to program A500_8mb_ide2.jed to CPLD. It's straightforward to use but won't run on later versions of Windows, don't waste your time trying.
https://www.microchip.com/en-us/development-tool/ATMISP
You will need to power the board. There is a power header next to the JTAG port. It worked fine for me connecting this header to a USB port on the XP machine.
After the CPLD is programmed you still need to copy the Oktapussy driver to the EEPROM. This is covered with screenshots in a guide in the A500_8MB_ide2 project.
Set J164-166 to FLASHROM mode.
Boot the Amiga from the A500_8MB_IDE2.adf file from A500_8MB_ide2 project.
When the Amiga is booted open AmigaShell and type DF0:flashem -i, it should return a flashID. If the flashID is FFFF there's something wrong.
If that step worked type "DF0:flashem -d 0" to dump the rom to screen; it should return ff for each byte. If it doesn't, type "DF0:flashem -e" to erase it then dump the rom again to check.
Type "DF0:flashem -w oktapussy.bin" to write the oktapussy driver to ROM.
Type "DF0:flashem -d 0" to dump the rom and check it wrote correctly.
Switch off the Amiga and change JP164-166 to ENABLE mode. Make sure you install the AUTOBOOT jumper so the driver autoconfigs. The machine will now autoboot from Kickstarts 1.3 or above.
The Oktapussy driver you just flashed to the EPROM is limited to 4 gb drives (even using OS3.2), so if you want to use a larger drive you need to load the latest Oktapussy driver from disk.
If you are using AmigaOS 1.3 you can't fix this problem, you need OS2.1 or above.
Partition and format your drive as usual and make sure the boot partition is within the first 4 gb of the drive, then install your desired version Workbench. There are online tutorials about how to do this.
Download Oktapussy from Aminet https://aminet.net/package/disk/misc/oktapus and install it on the Amiga.
Copy the "at" driver to DH0:Expansion (assuming DH0: is your boot device).
Add the following as the very first line of s:startup-sequence: LoadIDE DH0:Expansion/at quiet reset
Using the driver above in ram and PFS3 file system the interface can achieve read/write in the order of 1.3 MB/s. That's really impressive for a stock 68000, on par with the onboard A1200 Gayle interface with driver in ROM. Nice work by the developers of A500_8MB_ide2 and Oktapussy driver!
For CD Roms you need to install IDEFix97. Edit the CD0: icon to use ad_atapi.device. If it's the slave it'll be unit 1.
https://aminet.net/package/driver/media/IDEfix97
The prototype machine has an 8 GB CF card as master and a laptop DVD rom/CDRW as slave on CPU Board's IDE interface and it seems really stable.
The interface is set up for cable select - IDE CS line (pin 28) is grounded, so you can choose which drive is master/slave wihout jumpers, useful for laptop IDE cd roms and CF cards. Just use the right type of cable or both will be master (one of the connectors must have pin 28 as not connected so there is a slave - most 80 conductor cables have this). If you set Master/Slave jumpers on your drive it will override cable select.
A STL file and FreeCad (v0.20.1) file for 3d printable keystone bracket for the CPU card is included. The bracket has holes for subminiature toggle switches to enable/disable autoboot and the card itself. The size is standard but is specifically designed around mouser part numbers 737-SW-T3-1A-A-A3-S1 and 737-SW-T3-4B-A-A3-S2. When the print is complete you will need to bend the bracket into shape (should be relatively obvious how it works). To bend the bracket I warm it with hot air at 140 degrees C to soften it then bend it around the edge of my workbench to get a nice tight corner. Use M3 screws, star washer, and nuts to attach to card.
Ram and IDE from A500_8MB_ide2 project. https://github.com/OlegMishin/A500_8MB_ide2
Edge connector symbol from OpenAmiga2000CoproAdapter https://github.com/SukkoPera/OpenAmiga2000CoproAdapter
Amiga A500/A2000 Technical Reference Manual
A2000 schematics (Commodore scanned and Amigawiki.org vector)
Coprocessor Expansion and 86 Pin Signals on Amiga Computers by Dave Haynie; presumably an internal Commodore document
Amiga Hardware Reference Manual about Autoconfig http://amigadev.elowar.com/read/ADCD_2.1/Hardware_Manual_guide/node02C7.html
Various component data sheets. Refer component metadata.
Application note for POF2JED software https://ww1.microchip.com/downloads/en/Appnotes/DOC0916.PDF
82S100 replacement project describes how to program the CPLD using the ByteBlaster parallel cable. https://github.com/MattisLind/82S100replacement?tab=readme-ov-file