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ADRV9026 readme & doc #1683
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# ADRV9026 HDL Project | ||||||
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- Evaluation board product page: [ADRV9026](https://www.analog.com/adrv9026) | ||||||
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Done, thanks. |
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- System documentation: https://wiki.analog.com/resources/eval/user-guides/adrv9026/quickstart | ||||||
- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/adrv9026/index.html | ||||||
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## Supported parts | ||||||
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| Part name | Description | | ||||||
|---------------------------------------------|-----------------------------------------------------------| | ||||||
| [ADRV9026](https://www.analog.com/ADRV9026) | Integrated, Quad RF Transceiver with Observation Path | | ||||||
| [ADRV9029](https://www.analog.com/ADRV9029) | Integrated, Quad RF Transceiver with Observation Path | | ||||||
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## Building the project | ||||||
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Please enter the folder for the FPGA carrier you want to use and read the README.md. |
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# ADRV9026/A10SOC HDL Project | ||
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## Building the project | ||
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``` | ||
cd projects/adrv9026/a10soc | ||
make | ||
``` | ||
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Corresponding device tree: [socfpga_arria10_socdk_adrv9025.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_adrv9025.dts) |
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# ADRV9026/VCU118 HDL Project | ||
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## Building the project | ||
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``` | ||
cd projects/adrv9026/vcu118 | ||
make | ||
``` | ||
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All of the RX/TX link modes can be found in the [ADRV9026 data sheet](https://www.analog.com/media/radioverse-adrv9026/adrv9026.pdf). We offer support for only a few of them. | ||
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The overwritable parameters from the environment: | ||
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- JESD_MODE - link layer encoder mode used; | ||
- 8B10B - 8b10b link layer defined in JESD204B, uses ADI IP as Physical layer | ||
- 64B66B - 64b66b link layer defined in JESD204C, uses Xilinx IP as Physical layer | ||
- [RX/TX]_LANE_RATE - lane rate of the [RX/TX] link (RX: MxFE to FPGA/TX: FPGA to MxFE) | ||
- [RX/TX]_NUM_LINKS - [RX/TX] number of links, which matches the number of MxFE devices | ||
- [RX/TX]_JESD_M - [RX/TX] number of converters per link | ||
- [RX/TX]_JESD_L - [RX/TX] number of lanes per link | ||
- [RX/TX]_JESD_S - [RX/TX] number of samples per converter per frame | ||
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Corresponding device tree: [vcu118_adrv9025.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/microblaze/boot/dts/vcu118_adrv9025.dts) |
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# ADRV9026/ZCU102 HDL Project | ||
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## Building the project | ||
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``` | ||
cd projects/adrv9026/zcu102 | ||
make | ||
``` | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. This README should have the parameters and the data sheet specified as well |
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Corresponding device tree: [zynqmp-zcu102-rev10-adrv9025.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025.dts) |
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ADRV9025 has been added in the documentation, but not in the README files. There is no information about ADRV9025 on analog.com. What do we know about this part?
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The ADRV9025 part existed but is now obsolete.