fix(Build): Share multi core data 7800x when using RISCV_LOAD#1568
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perkinsmg wants to merge 1 commit into
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fix(Build): Share multi core data 7800x when using RISCV_LOAD#1568perkinsmg wants to merge 1 commit into
perkinsmg wants to merge 1 commit into
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perkinsmg
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Jun 2, 2026
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The .shared section correctly shared data when using _arm/_riscv ld scripts. But it didn't work when use the max7800x.ld script with RISCV_LOAD=1. As a result, SystemCoreClock on the RISC-V side got uninitialised values. This meant that peripheral configuration could compute wrong divisors etc. Create a SHARED section that is defined for both ARM and RISC-V and place the .shared section there. I've also moved it to the end of the memory block to avoid wasting space, but I keep it by default in a location that doesn't get used for ICC1. Old CFS projects don't have the SHARED section defined, and replace the MEMORY command in the ld script with one that doesn't have SHARED. So we can't map to SHARED directly. Instead, place at the symbol value and add an assert that the mapped data fits in the region to force an error if not. If CFS doesn't provide SHARED, place the data at the very end of the memory and hope there's no conflict. Note that for multi-core projects, this location might conflict with ICC1, but old CFS projects would have been broken anyway so it doesn't matter too much. Signed-off-by: Michael Perkins <Michael.Perkins@analog.com>
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No objections, but might be nice to find someone who's more familiar with the bare metal / MSDK bits to validate as well, since my experience with the linking details is more limited, since our Zephyr integration doesn't use the MSDK linker scripts. |
ako-adi
reviewed
Jun 12, 2026
| SRAM2 (rwx) : ORIGIN = 0x20010000, LENGTH = 0x0000C000 /* 48kB SRAM2 - RV Data */ | ||
| SRAM2 (rwx) : ORIGIN = 0x20010000, LENGTH = 0x0000BFF8 /* ~48kB SRAM2 - RV Data */ | ||
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| SHARED (rw) : ORIGIN = 0x2001BFF8, LENGTH = 0x00000008 /* 8B Shared - ARM, RV Data */ |
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Description
The SystemCoreClock variable, placed into the .shared section, was only placed at identical addresses in the Cortex and RISC-V projects when using the _arm.ld and _rv ld scripts together. When using the max7800x.ld script and the RISCV_LOAD mechanism, the variable was placed at different addresses in both executables.
Fix this, by creating a SHARED memory region and placing the data there.
Note that there is a subtlety with how I do this: in CFS, we remove the MEMORY command from these .ld scripts and CFS provides it. Since old CFS projects won't have the SHARED memory region, we would get a link error if we map to that directly. So instead, define a symbol to that address, and map to that address instead. Use an assertion to check the data fits. Then, for old projects, we'll map the variable right to the end of memory if SHARED is not defined, otherwise CFS will provide the symbols with the address of the SHARED region defined there.
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