arch/risc-v/espressif: Bump common source version #16219
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This commit bumps common source version for RISC-V-based Espressif SoCs on NuttX. Specifically, this solves an issue regarding SPI flash frequency selection on ESP32-C6. Signed-off-by: Tiago Medicci Serrano <[email protected]>
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@tmedicci why add a no-op pr? |
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Sorry. I reverted the commit locally to get the boot log before the patch and that ended-up to this PR. Fixed! |
jerpelea
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Apr 16, 2025
xiaoxiang781216
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Summary
This PR bumps common source version for RISC-V-based Espressif SoCs on NuttX. Specifically, this solves an issue regarding SPI flash frequency selection on ESP32-C6.
Although 80MHz is the default frequency for the SPI flash, it isn't being set properly, as shown on testing section.
Impact
Impact on user: YES. Applications may run faster if the correct frequency is set.
Impact on build: NO.
Impact on hardware: YES. It sets the correct frequency for the SPI flash.
Impact on documentation: NO.
Impact on security: NO.
Impact on compatibility: NO.
Testing
This common source update fixes a known issue regarding SPI flash frequency on ESP32-C6. Before and after logs are provided as evidence for it. Build, flash and run the firmware on ESP32-C6 according to the following instructions:
Building
Running
Results
Compare the boot lgo before and after applying this patch and check the SPI flash frequency:
Before
Note: 80MHz was expected!
After
80MHz is set as expected.