STM32H7: set ADC PLL clock for various source configurations#29
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facchinm wants to merge 1 commit intoextrapatches-6.16.0from
Open
STM32H7: set ADC PLL clock for various source configurations#29facchinm wants to merge 1 commit intoextrapatches-6.16.0from
facchinm wants to merge 1 commit intoextrapatches-6.16.0from
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@manchoz can you give it a spin on x8 / h7 ? |
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@facchinm LGTM 👍 Tested both with X8 and H7 with Portenta Breakout Carrier. |
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Replaces c65d254
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Migration actions required
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