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@amilendra amilendra commented Jan 29, 2026

These two patches add the following needed for SME support in picolibc

  1. If SME or SME2 is enabled,

1.1 Clear TPIDR2_EL0 [1]
The value of TPIDR2_EL0 resets to an architecturally UNKNOWN value at warm reset. This means we need to clear it manually at startup.

1.2 Initialise SME Streaming SVE Vector length to 2048 bits Initialize the SME control register SMCR_EL3 [2] to set the effective streaming SVE vector length to the maximum supported value of 2048 bits.

  1. Add implementation of the __aarch64_sme_accessible

compiler-rt relies on the the __aarch64_sme_accessible support function to emit SME ABI support routines calls [3]. __aarch64_sme_accessible returns non-zero when SME support is enabled in the underlying hardware.

[1] https://developer.arm.com/documentation/ddi0601/2025-09/AArch64-Registers/TPIDR2-EL0--EL0-Read-Write-Software-Thread-ID-Register-2?lang=en
[2] https://developer.arm.com/documentation/ddi0601/2025-09/AArch64-Registers/SMCR-EL3--SME-Control-Register--EL3-?lang=en
[3] llvm/llvm-project@2b05fa8

@amilendra amilendra requested a review from a team as a code owner January 29, 2026 13:51
@amilendra amilendra force-pushed the picolib-sme-initialization branch from c56649d to 76d6da9 Compare January 29, 2026 15:24
These two patches add the following needed for SME support in picolibc

1. If SME or SME2 is enabled at EL3,

1.1 Clear TPIDR2_EL0 [1]
The value of TPIDR2_EL0 resets to an architecturally UNKNOWN value
at warm reset. This means we need to clear it manually at startup.

1.2 Initialise SME Streaming SVE Vector length to 2048 bits
Initialize the SME control register SMCR_EL3 [2] to set the
effective streaming SVE vector length to the maximum supported
value of 2048 bits.

2. Add implementation of the __aarch64_sme_accessible

compiler-rt relies on the the __aarch64_sme_accessible support
function to emit SME ABI support routines calls [3].
__aarch64_sme_accessible returns non-zero when SME support is
enabled in the underlying hardware.

[1] https://developer.arm.com/documentation/ddi0601/2025-09/AArch64-Registers/TPIDR2-EL0--EL0-Read-Write-Software-Thread-ID-Register-2?lang=en
[2] https://developer.arm.com/documentation/ddi0601/2025-09/AArch64-Registers/SMCR-EL3--SME-Control-Register--EL3-?lang=en
[3] llvm/llvm-project@2b05fa8
@amilendra amilendra force-pushed the picolib-sme-initialization branch from 76d6da9 to f99c303 Compare January 29, 2026 16:59
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