Release v1.4.9

• New functionality:

  • Improved AFI load times for pipelined accelerator designs. For more details please see Amazon FPGA image (AFI) pre-fetch and caching features.

• Ease of Use features:

  • Improved SDK Error messaging
  • Improved documentation to help with transition from HLX to HDK command line flows and vice versa
  • Incorporates feedback from aws-fpga Issue 458 by making the init_ddr function, used in design simulations to initialize DDR, more generic by moving out ATG deselection logic to a new deselect_atg_hw task

• Bug Fixes:

  • Fixed Shell simulation model (sh_bfm) issue on PCIM AXI read data channel back pressure which was described in HDK 1.4.8 Errata.
  • Fixed HDK simulation example which demonstrates DMA and PCIM traffic in parallel.