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  • Student at Ho Chi Minh City University of Technology
  • Ho Chi Minh City, Vietnam

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bangnguyen1144/README.md

WELCOME TO MY PAGE 👏👏👏

👋 Hi, I'm Bang Nguyen.
🎓 I'm a senior student at Ho Chi Minh City University of Technology (HCMUT), majoring in Electronics and Telecommunications.

🛠️ Technical Skills:
🔹Languages: C, Verilog, System Verilog.
🔹EDA Tools: Vivado, Quartus Prime, Cadence Virtuoso.
🔹Platforms: Intel FPGA, Xilinx FPGA.

📫 How to reach me:

📌 LinkedIn: linkedin.com/in/bangnguyen1144

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  1. FPGA-Based-Edge-Detection-with-Salt-and-Pepper-Denoising FPGA-Based-Edge-Detection-with-Salt-and-Pepper-Denoising Public

    FPGA-based edge detection with salt-and-pepper denoising was successfully implemented on the DE10-Standard board, and results were displayed on a VGA display.

    Verilog