GitHub - bhavya76/RISC-Assembler-and-Simulator: Developed a simulation of an assembler and compiler using a given ISA

Assembler and Simulator

Name		Name	Last commit message	Last commit date
Latest commit History 3 Commits
Assembler4.py		Assembler4.py
BonusQ5.py		BonusQ5.py
ISA_PROJECT_ASSIGNMENT.pdf		ISA_PROJECT_ASSIGNMENT.pdf
README.md		README.md
Simulator4.py		Simulator4.py
and_ISA.py		and_ISA.py
asm_copy2.py		asm_copy2.py
cmp_ISA.py		cmp_ISA.py
hlt_ISA.py		hlt_ISA.py
ld_ISA.py		ld_ISA.py
ls_ISA.py		ls_ISA.py
mov_ISA.py		mov_ISA.py
not_ISA.py		not_ISA.py
rs_ISA.py		rs_ISA.py
simu.py		simu.py
st_ISA.py		st_ISA.py
sub_ISA.py		sub_ISA.py

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