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birdybro/README.md

Hi there 👋 I'm birdybro!

I currently am a Jr. ERP Administrator at a very modern, large monolithic machining company. I used to do primarily IT Support Analyst and Systems Administration, some ERP Administration, some IT Systems Engineering, some auditing, some 3d printing evangelism, and some Software Development at a plastics manufacturing company for my day job. Too many hats, it was miserable. Before that, I was a manager of a 50+ employee pizza place that did over $70k gross sales per week by the time I left.

I try to learn everything I can about software programming, hardware description languages, and much more in my spare time. Basically, I love manufacturing and tech combined, and love providing great service for my customers or "customers", whoever that may be.

🔭 I’m currently diving deep into my new career direction of being an Infor CloudSuite Industrial SyteLine expert one day. 🌱 I’m currently learning Verilog/SystemVerilog hardware description languages.
💬 Ask me about the MiSTer FPGA project!
📫 How to reach me: kcoleman@misterfpga.co
😄 Pronouns: He/Him
⚡ Fun fact: I have two wonderful parrots named Lily and Lorenzo, hence the username...

Some stuff I've done and random things about me:

Projects I'm working on now:

Exploring the craven depths possible of vibe coding anything on a whim possible. Win or lose, it's interesting regardless what works and doesn't work.

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  1. MiSTer-devel/MkDocs_MiSTer MiSTer-devel/MkDocs_MiSTer Public

    MiSTer FPGA Documentation site built using Material for MkDocs.

    HTML 96 47

  2. SDRAMsim_MiSTer SDRAMsim_MiSTer Public

    SystemVerilog Simulation model for the XSDS RAM module addon board for the MiSTer FPGA project

    SystemVerilog 1

  3. Reimbursd Reimbursd Public

    Reimbursd is a privacy focused mobile and web app that helps you document your expenses.

    TypeScript 1

  4. arm7tdmi-sv arm7tdmi-sv Public

    ARM7TDMI-S reimplementation in SystemVerilog

    SystemVerilog 2

  5. sn74xx_sv sn74xx_sv Public

    library of 7400-series integrated circuits reimplemented in synthesizable SystemVerilog

    SystemVerilog 1

  6. TMS34010_sv TMS34010_sv Public

    TMS34010 reimplementation in SystemVerilog

    SystemVerilog 1