riscv32: Compose the progbuf read/write instructions via macros, drop arrays

Author: ALTracer

src/target/riscv32.c

@@ -578,42 +578,65 @@ static void riscv32_sysbus_mem_write(
 		riscv32_sysbus_mem_adjusted_write(hart, address, data, remainder, native_access_width, native_access_length);
 }
 
+#define RV_OPCODE      0x0000007fU
+#define RV_FUNCT3      0x00003000U
+#define RV_RS1_MASK    0x000f8000U
+#define RV_LOAD_RD     0x00000f80U
+#define RV_LOAD_IMM12  0xfff00000U
+#define RV_STORE_RS2   0x01f00000U
+#define RV_STORE_IMM12 0xfe000f70U
+
+#define RV_LOAD_BYTE  0x00000003U
+#define RV_LOAD_HALF  0x00001003U
+#define RV_LOAD_WORD  0x00002003U
+#define RV_STORE_BYTE 0x00000023U
+#define RV_STORE_HALF 0x00001023U
+#define RV_STORE_WORD 0x00002023U
+
+#define RV_RS1_A0 0x00050000U
+#define RV_RS2_A1 0x00b00000U
+#define RV_RD_A0  0x00000500U
+#define RV_RD_A1  0x00000580U
+
+/* RV32I opcodes: load word/half/byte from address A0 into A1 (clobber) */
+#define RV_LW_A1_A0 (RV_LOAD_WORD | RV_RD_A1 | RV_RS1_A0) // 0x00052583U // lw a1, 0(a0)
+#define RV_LH_A1_A0 (RV_LOAD_HALF | RV_RD_A1 | RV_RS1_A0) // 0x00051583U // lh a1, 0(a0)
+#define RV_LB_A1_A0 (RV_LOAD_BYTE | RV_RD_A1 | RV_RS1_A0) // 0x00050583U // lb a1, 0(a0)
+/* RV32I opcodes: store word/half/byte in a1 into address pointed-by a0 */
+#define RV_SW_A1_A0 (RV_STORE_WORD | RV_RS2_A1 | RV_RS1_A0) // 0x00b52023U // sw a1, 0(a0)
+#define RV_SH_A1_A0 (RV_STORE_HALF | RV_RS2_A1 | RV_RS1_A0) // 0x00b51023U // sh a1, 0(a0)
+#define RV_SB_A1_A0 (RV_STORE_BYTE | RV_RS2_A1 | RV_RS1_A0) // 0x00b50023U // sb a1, 0(a0)
+
+#if 0
+#define RV_ADDI         0x00000013U
+#define RV_IMM12(x)     ((x << 20U) & RV_LOAD_IMM12)
+/* RV32I opcodes: load word/half/byte from address A0 into A1 (clobber), postincrement A0 */
+#define RV_ADDI_A0_A0_4 (RV_ADDI | RV_RD_A0 | RV_RS1_A0 | RV_IMM12(4U)) // 0x00450513U // addi a0, a0, 4
+#endif
+
 static void riscv32_progbuf_mem_read(
 	riscv_hart_s *const hart, void *const dest, const target_addr_t src, const size_t len)
 {
 	/* Figure out the maximal width of access to perform, up to the bitness of the target */
 	const uint8_t access_width = riscv_mem_access_width(hart, src, len);
 	const uint8_t access_length = 1U << access_width;
 
-	/* RV32I opcodes: load word/half/byte from address A0 into A1 (clobber), postincrement A0 */
-	static const uint32_t progbuf_read32[2] = {
-		0x00052583U, // lw a1, 0(a0)
-		0x00450513U, // addi a0, a0, 4
-	};
-	static const uint32_t progbuf_read16[2] = {
-		0x00051583U, // lh a1, 0(a0)
-		0x00450513U, // addi a0, a0, 4
-	};
-	static const uint32_t progbuf_read8[2] = {
-		0x00050583U, // lb a1, 0(a0)
-		0x00450513U, // addi a0, a0, 4
-	};
-	const uint32_t *progbuf_read = progbuf_read32;
+	uint32_t progbuf_read = RV_LOAD_BYTE;
 	switch (access_width) {
 	case RV_MEM_ACCESS_8_BIT:
-		progbuf_read = progbuf_read8;
+		progbuf_read = RV_LB_A1_A0;
 		break;
 	case RV_MEM_ACCESS_16_BIT:
-		progbuf_read = progbuf_read16;
+		progbuf_read = RV_LH_A1_A0;
 		break;
 	case RV_MEM_ACCESS_32_BIT:
-		progbuf_read = progbuf_read32;
+		progbuf_read = RV_LW_A1_A0;
 		break;
 	default:
 		return;
 	}
 	/* Fill the program buffer */
-	if (!riscv_dm_write(hart->dbg_module, RV_DM_PROGBUF_BASE, progbuf_read[0]))
+	if (!riscv_dm_write(hart->dbg_module, RV_DM_PROGBUF_BASE, progbuf_read))
 		return;
 	/* Append literal ebreak (if impebreak is not reached) */
 	if (hart->progbuf_size > 1) {
@@ -656,35 +679,23 @@ static void riscv32_progbuf_mem_write(
 	/* Figure out the maxmial width of access to perform, up to the bitness of the target */
 	const uint8_t access_width = riscv_mem_access_width(hart, dest, len);
 	const uint8_t access_length = 1U << access_width;
-	/* RV32I opcodes: store word/half/byte in a1 into address pointed-by a0 */
-	static const uint32_t progbuf_write32[] = {
-		0x00b52023U, // sw a1, 0(a0)
-		0x00450513U, // addi a0, a0, 4
-	};
-	static const uint32_t progbuf_write16[] = {
-		0x00b51023U, // sh a1, 0(a0)
-		0x00450513U, // addi a0, a0, 4
-	};
-	static const uint32_t progbuf_write8[] = {
-		0x00b50023U, // sb a1, 0(a0)
-		0x00450513U, // addi a0, a0, 4
-	};
-	const uint32_t *progbuf_write = progbuf_write32;
+
+	uint32_t progbuf_write = RV_STORE_BYTE;
 	switch (access_width) {
 	case RV_MEM_ACCESS_8_BIT:
-		progbuf_write = progbuf_write8;
+		progbuf_write = RV_SB_A1_A0;
 		break;
 	case RV_MEM_ACCESS_16_BIT:
-		progbuf_write = progbuf_write16;
+		progbuf_write = RV_SH_A1_A0;
 		break;
 	case RV_MEM_ACCESS_32_BIT:
-		progbuf_write = progbuf_write32;
+		progbuf_write = RV_SW_A1_A0;
 		break;
 	default:
 		return;
 	}
 	/* Fill the program buffer */
-	if (!riscv_dm_write(hart->dbg_module, RV_DM_PROGBUF_BASE, progbuf_write[0]))
+	if (!riscv_dm_write(hart->dbg_module, RV_DM_PROGBUF_BASE, progbuf_write))
 		return;
 	/* Append literal ebreak (if impebreak is not reached) */
 	if (hart->progbuf_size > 1) {