Hi — saw npurun. NPU-first LLM runtime on Snapdragon X Elite (Windows on ARM) is a tight target and the kind of project where small QNN graph changes can silently route ops to CPU between releases. Your topic tags (genie, npu, qualcomm, snapdragon-x-elite, windows-arm64) put you squarely in the validation gap we work on.
We built EdgeGate (https://edgegate.frozo.ai) around this: a CI gate that runs your runtime on real Snapdragon via Qualcomm AI Hub, asserts NPU routing op-by-op, and blocks the merge if latency or memory regresses. Free tier covers small projects.
Would be a natural validation layer for a runtime project like this. Happy to set up a one-shot gate on npurun as a proof — you'd see it as a passing/failing check on a sample PR, no commitment, just data.
Open to it? Either way, nice work on the runtime.
— Ashish (EdgeGate)
Hi — saw npurun. NPU-first LLM runtime on Snapdragon X Elite (Windows on ARM) is a tight target and the kind of project where small QNN graph changes can silently route ops to CPU between releases. Your topic tags (
genie,npu,qualcomm,snapdragon-x-elite,windows-arm64) put you squarely in the validation gap we work on.We built EdgeGate (https://edgegate.frozo.ai) around this: a CI gate that runs your runtime on real Snapdragon via Qualcomm AI Hub, asserts NPU routing op-by-op, and blocks the merge if latency or memory regresses. Free tier covers small projects.
Would be a natural validation layer for a runtime project like this. Happy to set up a one-shot gate on npurun as a proof — you'd see it as a passing/failing check on a sample PR, no commitment, just data.
Open to it? Either way, nice work on the runtime.
— Ashish (EdgeGate)