pulley: Reimplement wasm loads/stores & memory opcodes

[alexcrichton]

This commit is a large refactoring to reimplement how WebAssembly loads/stores are translated to Pulley opcodes when using the interpreter. Additionally the functionality related to memory support has changed quite a bit with the interpreter as well. This is all based off comments on #10102 with the end goal of folding the two Pulley opcodes today of "do the bounds check" and "do the load" into one opcode. This is intended to reduce the number of opcodes and overall improve interpreter throughput by minimizing turns of the interpreter loop.

The basic idea behind this PR is that a new basic suite of loads/stores are added to Pulley which trap if the address is zero. This provides a route to translate trapping loads/stores in CLIF to Pulley bytecode without actually causing segfaults at runtime. WebAssembly translation to CLIF is then updated to use the select trick for wasm loads/stores where either 0 is loaded from or the actual address is loaded from. Basic support for translation and such is added for this everywhere, and this ensures that all loads/stores for wasm will be translated successfully with Pulley.

The next step was to extend the "g32" addressing mode preexisting in Pulley to support a bounds check as well. New pattern-matches were added to ISLE to search for a bounds check in the address of a trapping load/store. If found then the entire chain of operations necessary to compute the address are folded into a single "g32" opcode which ends up being a fallible load/store at runtime.

To fit all this into Pulley this commit contains a number of refactorings to shuffle around existing opcodes related to memory and extend various pieces of functionality here and there:

• Pulley now uses a AddrFoo types to represent addressing modes as a single immediate rather than splitting it up into pieces for each method. For example AddrO32 represents "base + offset32". AddrZ represents the same thing but traps if the address is zero. The AddrG32 mode represents a bounds-checked 32-bit linear memory access on behalf of wasm.

• Pulley loads/stores were reduced to always using an AddrFoo immediate. This means that the old offset8 addressing mode was removed without replacement here (to be added in the future if necessary). Additionally the suite of sign-extension modes supported were trimmed down to remove 8-to-64, 16-to-64, and 32-to-64 extensions folded as part of the opcode. These can of course always be re-added later but probably want to be added just for the G32 addressing mode as opposed to all addressing modes.

• The interpreter itself was refactored to have an AddressingMode trait to ensure that all memory accesses, regardless of addressing modes, are largely just copy/pastes of each other. In the future it might make sense to implement these methods with a macro, but for now it's copy/paste.

• In ISLE the XLoad generic instruction removed its ext field to have extensions handled exclusively in ISLE instead of partly in emit.rs.

• Float/vector loads/stores now have "g32" addressing (in addition to the "z" that's required for wasm) since it was easy to add them.

• Translation of 1-byte accesses on Pulley from WebAssembly to CLIF no longer has a special case for using a >= b instead of a > b - 1 to ensure that the same bounds-check instruction can be used for all sizes of loads/stores.

• The bounds-check which folded a load-of-the-bound into the opcode is now present as a "g32bne" addressing mode. with its of suite of instructions to boo.

Overall this PR is not a 1:1 replacement of all previous opcodes with exactly one opcode. For example loading 8 bits sign-extended to 64-bits is now two opcodes instead of one. Additionally some previous opcodes have expanded in size where for example the 8-bit offset mode was remove in favor of only having 32-bit offsets. The goal of this PR is to reboot how memory is handled in Pulley. All loads/stores now use a specific addressing mode and currently all operations supported across addressing modes are consistently supported. In the future it's expected that some features will be added to some addressing modes and not others as necessary, for example extending the "g32" addressing mode only instead of all addressing modes.

For an evaluation of this PR:

• Code size: spidermonkey.cwasm file is reduced from 19M to 16M.
• Sightglass: pulldown-cmark is improved by 15%
• Sightglass: bz2 is improved by 20%
• Sightglass: spidermonkey is improved by 22%
• Coremark: score improved by 40%

Overall this PR and new design looks to be a large win. This is all driven by the reduction in opcodes both for compiled code size and execution speed by minimizing turns of the interpreter loop. In the end I'm also pretty happy with how this turned out and I think the refactorings are well worth it.

[alexcrichton]

I'll note that one thing I'm having difficulty adding a disas test for is something which generates a "g32bne" lowering. I can see the instructions getting emitted in spidermonkey.cwasm but I am having a difficult time reducing things down to something that can be added as an example. Most loads aren't "sinkable" which is why it's not used super often at least.

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