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Expose x86 instruction encoding #147

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Merged
merged 4 commits into from
May 23, 2025
Merged

Expose x86 instruction encoding #147

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1814060
Expose x86 instruction encoding
Oct 9, 2023
7ebe8e6
Merge pull request #176 from capstone-rust/add-mos65xx-and-sh
jiegec May 23, 2025
7e34914
Merge remote-tracking branch 'origin/master' into feature/cs_x86_enco…
jiegec May 23, 2025
700233a
rs: provide Rust-y X86Encoding struct and add tests
jiegec May 23, 2025
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9 changes: 7 additions & 2 deletions capstone-rs/src/arch/x86.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@ use core::convert::From;
use core::convert::TryInto;
use core::{cmp, fmt, slice};

use capstone_sys::cs_x86_encoding;
use capstone_sys::{
cs_ac_type, cs_x86, cs_x86_op, cs_x86_op__bindgen_ty_1, x86_op_mem, x86_op_type,
};
Expand All @@ -24,8 +25,7 @@ use crate::instruction::{RegAccessType, RegId, RegIdInt};
/// Contains X86-specific details for an instruction
pub struct X86InsnDetail<'a>(pub(crate) &'a cs_x86);

// todo(tmfink): expose new types cs_x86__bindgen_ty_1, cs_x86_encoding, x86_xop_cc,
// cs_x86_op::access
// todo(tmfink): expose new types cs_x86__bindgen_ty_1, cs_x86_op::access

impl X86OperandType {
fn new(op_type: x86_op_type, value: cs_x86_op__bindgen_ty_1) -> X86OperandType {
Expand Down Expand Up @@ -105,6 +105,11 @@ impl<'a> X86InsnDetail<'a> {
&self.0.opcode
}

/// Instruction encoding information, e.g. displacement offset, size.
pub fn encoding(&self) -> cs_x86_encoding {
self.0.encoding
}

/// REX prefix: only a non-zero value is relevant for x86_64
pub fn rex(&self) -> u8 {
self.0.rex
Expand Down