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@joao404 joao404 commented May 10, 2025

Hello,

I have adapted time_driver_tim.rs in the same manner as time_driver.rs is for stm32 in embassy repo. embassy_time with version 0.4.0 should now be possible as requested by #82

@joao404 joao404 changed the title Switched to embassy_time 0.2.0 and embassy_executor 0.7.0 Switched to embassy_time 0.4.0 and embassy_executor 0.7.0 May 10, 2025
return false;
}

// Write the CCR value regardless of whether we're going to enable it now or not.
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The indentation should be fixed here.

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Yes, thank you. Used an auto formatter.

@romainreignier
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romainreignier commented May 12, 2025

I @joao404 Nice changes!

I have tested on CH32V003 and a basic blinky and it freezes after a couple of seconds:

Example from ch32-hal-template:

#![no_std]
#![no_main]
#![feature(type_alias_impl_trait)]

use embassy_executor::Spawner;
use embassy_time::Timer;
use ch32_hal::gpio::{AnyPin, Level, Output, Pin};
use ch32_hal::println;
use panic_halt as _;


#[embassy_executor::task]
async fn blink(pin: AnyPin, interval_ms: u64) {
    let mut led = Output::new(pin, Level::Low, Default::default());

    loop {
        led.set_high();
        Timer::after_millis(interval_ms).await;
        led.set_low();
        Timer::after_millis(interval_ms).await;
    }
}


#[embassy_executor::main(entry = "qingke_rt::entry")]
async fn main(spawner: Spawner) -> ! {
    ch32_hal::debug::SDIPrint::enable();
    let p = ch32_hal::init(ch32_hal::Config::default());

    // Adjust the LED GPIO according to your board
    spawner.spawn(blink(p.PC4.degrade(), 1000)).unwrap();
    loop {
        Timer::after_millis(1000).await;
        println!("tick");
    }
}

Output:

2025-05-12 14:30:19.500134051 +02:00: tick
2025-05-12 14:30:20.498323020 +02:00: tick
2025-05-12 14:30:21.496440003 +02:00: tick
2025-05-12 14:30:22.495185681 +02:00: tick
2025-05-12 14:30:23.493594200 +02:00: tick
2025-05-12 14:30:24.492035937 +02:00: tick
2025-05-12 14:30:25.490735536 +02:00: tick
2025-05-12 14:30:26.489222521 +02:00: tick
2025-05-12 14:30:27.488140784 +02:00: tick
[stuck]

Edit: I have tried on a CH32V307 and it seems to work (ran for 2 hours before I stopped).

Edit 2: In the case of the V003 freeze:

wlink regs
dpc(pc):   0x0000099c
x0   zero: 0x00000000
x1     ra: 0x000009b6
x2     sp: 0x200007e8
x3     gp: 0x20000800
x4     tp: 0xa0c87054
x5     t0: 0x40000000
x6     t1: 0x00000008
x7     t2: 0x20000148
x8     s0: 0x00000000
x9     s1: 0x00000008
x10    a0: 0x00000000
x11    a1: 0x00000000
x12    a2: 0x200007f8
x13    a3: 0x0089583e
x14    a4: 0x00000000
x15    a5: 0x00000000
marchid  : 0xdc68d841
mimpid   : 0xdc688001
mhartid  : 0x00000000
misa     : 0x40800014
mtvec    : 0x00000003
mscratch : 0x42314b2c
mepc     : 0x00000992
mcause   : 0x80000026
mtval    : 0x00000000
mstatus  : 0x00001888
dcsr     : 0x400000c3
dpc      : 0x0000099c
dscratch0: 0x00000000
dscratch1: 0x00000000
gintenr  : 0x00000000
intsyscr : 0x00000003
corecfgr : 0x00000000
wlink status
wlink status
16:36:51 [INFO] Connected to WCH-Link v2.12(v32) (WCH-LinkE-CH32V305)
16:36:52 [INFO] Attached chip: CH32V003 [CH32V003F4U6] (ChipID: 0x00310500)
16:36:52 [INFO] Chip ESIG: FlashSize(16KB) UID(cd-ab-2b-23-56-bc-4e-8b)
16:36:52 [INFO] Flash protected: false
16:36:52 [INFO] RISC-V ISA(misa): Some("RV32CEX")
16:36:52 [INFO] RISC-V arch(marchid): Some("WCH-V2A")
16:36:52 [WARN] The halt status may be incorrect because detaching might resume the MCU
16:36:52 [INFO] Dmstatus {
    .0: 0x4c0382,
    allhavereset: true,
    anyhavereset: true,
    allresumeack: false,
    anyresumeack: false,
    allunavail: false,
    anyunavail: false,
    allrunning: false,
    anyrunning: false,
    allhalted: true,
    anyhalted: true,
    authenticated: true,
    version: 0x2,
}
16:36:52 [INFO] Dmcontrol {
    .0: 0x80000001,
    haltreq: true,
    resumereq: false,
    ackhavereset: false,
    ndmreset: false,
    dmactive: true,
}
16:36:52 [INFO] Hartinfo {
    .0: 0x2120f4,
    nscratch: 0x2,
    dataaccess: true,
    datasize: 0x2,
    dataaddr: 0xf4,
}
16:36:52 [INFO] Abstractcs {
    .0: 0x8000002,
    progbufsize: 0x8,
    busy: false,
    cmderr: 0x0,
    datacount: 0x2,
}
16:36:52 [INFO] haltsum0: 0x1
`mepc : 0x00000992`
000008b2 <embassy_executor::arch::thread::Executor::run::hc2505085baeb64d7>:
     992: 00062023      sw      zero, 0x0(a2)
     996: c199          beqz    a1, 0x99c <embassy_executor::arch::thread::Executor::run::hc2505085baeb64d7+0xea>
     998: 8004a073      csrs    0x800, s1
     99c: d575          beqz    a0, 0x988 <embassy_executor::arch::thread::Executor::run::hc2505085baeb64d7+0xd6>
     99e: 8004b5f3      csrrc   a1, 0x800, s1
     9a2: 4910          lw      a2, 0x10(a0)
     9a4: 4940          lw      s0, 0x14(a0)
     9a6: 89a1          andi    a1, a1, 0x8
     9a8: 9a75          andi    a2, a2, -0x3
     9aa: c910          sw      a2, 0x10(a0)
     9ac: c199          beqz    a1, 0x9b2 <embassy_executor::arch::thread::Executor::run::hc2505085baeb64d7+0x100>
     9ae: 8004a073      csrs    0x800, s1
     9b2: 4d4c          lw      a1, 0x1c(a0)
     9b4: 9582          jalr    a1
     9b6: 8522          mv      a0, s0
     9b8: d861          beqz    s0, 0x988 <embassy_executor::arch::thread::Executor::run::hc2505085baeb64d7+0xd6>
     9ba: b7d5          j       0x99e <embassy_executor::arch::thread::Executor::run::hc2505085baeb64d7+0xec>
     9bc: 00000097      auipc   ra, 0x0
     9c0: 5a2080e7      jalr    0x5a2(ra) <core::panicking::panic_fmt::h562158adaf807ac7>

@joao404
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joao404 commented May 12, 2025

Hi,

unfortunately I do not have a wch-link to try it out myself. I thought I could use my ST-Link and did not order one. I have a ch32v307vct6 dev board and use wchisp (which works great by the way, thank you for providing it). I tried it using a blocking and async UartTx connection and had no problem for 10 minutes(then I stopped testing).
I tried it with SDIPrint but it blocks immediately (probably because I have no wch link).
As project base I am using your hal template with nightly toolchain and "wchisp flash" as runner. Besides switching to embassy executor 0.7.0 and embassy time 0.4.0, I deleted option "task-arena-size-192" of embassy-executor.

I will try to find a solution with your debug information

@romainreignier
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Ok, I see.
First, I think that we need to understand mcause : 0x80000026.
But we might need the expertise of @andelf or @Codetector1374

@joao404
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joao404 commented May 13, 2025

If I understand documentation correctly, highest bit set means that we have an interrupt and 0x26 is number of interrupt. Compared with https://github.com/ch32-rs/ch32-data/blob/main/data/interrupts/CH32V0.yaml it should be TIM2, which has thrown interrupt. This fits to our Cargo.toml where "time-driver-tim2" is activated for ch32 hal.
mtvec should define address of interrupt but is set to zero. Lower to bites are accessing mode of interrupt.

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