Add missing header includes in source files

Author: calebofearth

src/abr_libs/config/compile.yml

@@ -7,8 +7,6 @@ targets:
   tb:
     directories: [$COMPILE_ROOT/rtl]
     files:
-      - $COMPILE_ROOT/rtl/abr_sva.svh
-      - $COMPILE_ROOT/rtl/abr_macros.svh
       - $COMPILE_ROOT/rtl/abr_1r1w_ram.sv
       - $COMPILE_ROOT/rtl/abr_1r1w_be_ram.sv
       - $COMPILE_ROOT/rtl/abr_1r1w_512x4_ram.sv
@@ -40,8 +38,6 @@ targets:
   rtl:
     directories: [$COMPILE_ROOT/rtl]
     files:
-      - $COMPILE_ROOT/rtl/abr_sva.svh
-      - $COMPILE_ROOT/rtl/abr_macros.svh
       - $COMPILE_ROOT/rtl/abr_1r1w_ram.sv
       - $COMPILE_ROOT/rtl/abr_1r1w_be_ram.sv
       - $COMPILE_ROOT/rtl/abr_1r1w_512x4_ram.sv

src/abr_libs/rtl/abr_icg.sv

@@ -12,6 +12,8 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
+`include "abr_config_defines.svh"
+
 `ifndef TECH_SPECIFIC_ICG
     module `ABR_ICG (
         input logic clk,
@@ -31,4 +33,4 @@
         assign clk_cg = clk && en_lat;
 
     endmodule
-`endif
+`endif

src/abr_libs/rtl/abr_piso_multi.sv

@@ -35,6 +35,8 @@ module abr_piso_multi #(
   output logic [PISO_ACT_OUTPUT_RATE-1:0] data_o
 );
 
+  `include "abr_prim_assert.sv"
+
   localparam BUFFER_W_DELTA = PISO_BUFFER_W - PISO_ACT_INPUT_RATE;
 
   logic [PISO_BUFFER_W-1:0] buffer, buffer_d;

src/abr_sampler_top/rtl/abr_sampler_top.sv

@@ -59,7 +59,9 @@ module abr_sampler_top
 
   );
 
-//Signal Declarations
+  `include "abr_prim_assert.sv"
+
+  //Signal Declarations
   logic                    sha3_process;
   logic                    sha3_run;
 

src/abr_top/config/compile.yml

@@ -5,13 +5,11 @@ targets:
   tb:
     directories: [$COMPILE_ROOT/rtl]
     files:
-      - $COMPILE_ROOT/rtl/abr_config_defines.svh
       - $COMPILE_ROOT/rtl/abr_params_pkg.sv
       - $COMPILE_ROOT/rtl/abr_reg_pkg.sv
   rtl:
     directories: [$COMPILE_ROOT/rtl]
     files:
-      - $COMPILE_ROOT/rtl/abr_config_defines.svh
       - $COMPILE_ROOT/rtl/abr_params_pkg.sv
       - $COMPILE_ROOT/rtl/abr_reg_pkg.sv
 ---
@@ -107,4 +105,4 @@ global:
         - '-noinherit_timescale=1ns/1ps'
         #- '-ucli -i dump.ucli'
       #sim:
-        #- '-ucli -i dump.ucli'        
+        #- '-ucli -i dump.ucli'        

src/ntt_top/rtl/ntt_top.sv

@@ -93,6 +93,8 @@ module ntt_top
     output logic ntt_done
 
 );
+    `include "abr_prim_assert.sv"
+
     //NTT mem signals
     //Masking internal - TODO: remove and merge with mem_wr/rd interface after testing
     mem_if_t share_mem_wr_req, share_mem_rd_req, share_mem_rd_req_reg;

src/sk_encode/rtl/skencode.sv

@@ -58,6 +58,8 @@ module skencode
         output logic skencode_done
     );
 
+    `include "abr_prim_assert.sv"
+
     localparam THE_LAST_ADDR = ((MLDSA_K * MLDSA_N)/4)+((MLDSA_L * MLDSA_N)/4)-1;
     localparam THE_LAST_API = ((MLDSA_K +MLDSA_L)*MLDSA_N*3)/32;
 
@@ -350,4 +352,4 @@ module skencode
 
     `ABR_ASSERT_NEVER(SKENCODE_ERROR_FLAG, error_flag, clk, !reset_n)
 
-endmodule
+endmodule